Custom IC Design

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Discussion

Transient data disappearing

Category: Custom IC Design

By malloryn

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updated over 14 years ago by Quek

1 replies • 14079 views
Discussion

Configure Physical Hierarchy and Virtuoso Floorplanner

Category: Custom IC Design

By corpMule

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updated over 14 years ago by Alex Soyer

5 replies • 19026 views
Discussion

Dynamic calculation of the power during each cycle

Category: Custom IC Design

By Ueue

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updated over 14 years ago by Andrew Beckett

1 replies • 14561 views
Discussion

Need to promote pins to one level Above

Category: Custom IC Design

By sathisha

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updated over 14 years ago by Andrew Beckett

5 replies • 19933 views
Discussion

setting for auto via to place vias despite existing cut shapes

Category: Custom IC Design

By linbo

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updated over 14 years ago by Andrew Beckett

3 replies • 15960 views
Discussion

Plot command failed

Category: Custom IC Design

By Renee

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updated over 14 years ago by Andrew Beckett

1 replies • 14098 views
Discussion

How to import cif file to virtuoso 6.1.3

Category: Custom IC Design

By wudiyyn

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updated over 14 years ago by StefanSL

1 replies • 14816 views
Discussion

How do I control CDLIn generating User Property information?

Category: Custom IC Design

By Amanda2

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updated over 14 years ago by Amanda2

6 replies • 16459 views
Discussion

IIP3 and NF measurements in cadence spectre for Fully Differential Active-RC Filter

Category: Custom IC Design

By jimito13

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started over 14 years ago

0 replies • 14368 views
Discussion

deselect when zoom to unconnected net?

Category: Custom IC Design

By linbo

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updated over 14 years ago by linbo

2 replies • 14445 views
Discussion

viewing the simulation results with viewer in cadence

Category: Custom IC Design

By Hazo

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updated over 14 years ago by Andrew Beckett

1 replies • 14737 views
Discussion

turning off VXL connectivity in non VXL context

Category: Custom IC Design

By linbo

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updated over 14 years ago by Andrew Beckett

1 replies • 14323 views
Discussion

Simulation with MATLAB generated data file as input to Anagol block

Category: Custom IC Design

By Analog Design

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updated over 14 years ago by Andrew Beckett

3 replies • 15192 views
Discussion

About function define

Category: Custom IC Design

By bobbygang

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updated over 14 years ago by bobbygang

6 replies • 17304 views
Discussion

turning off Illegal Weak-Connect check in VXL

Category: Custom IC Design

By linbo

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updated over 14 years ago by Quek

1 replies • 16104 views

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