Custom IC Design

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Discussion

LVS issue: short between global net VSS! and gnd

Category: Custom IC Design

By isazulkc

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updated over 6 years ago by Nhumai

3 replies • 21541 views
Discussion

Annotations are just way too overpowering

Category: Custom IC Design

By CADcasualty

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updated over 6 years ago by CADcasualty

29 replies • 26767 views
Discussion

PSS Harmonic Balance Analysis, unexpected results

Category: Custom IC Design

By MohsenShah

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updated over 6 years ago by MohsenShah

4 replies • 15576 views
Discussion

ADE Explorer Variables to VerilogA Parameter Arrays

Category: Custom IC Design

By Tjaart

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updated over 6 years ago by Tjaart

2 replies • 16344 views
Discussion

VIVA calculator dnl&inl

Category: Custom IC Design

By Simons

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updated over 6 years ago by Andrew Beckett

3 replies • 3634 views
Discussion

Transient simulation crashes SPECTRE181, APS

Category: Custom IC Design

By Michael H

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updated over 6 years ago by Michael H

2 replies • 16389 views
Discussion

How to access data in info databases in PSF directory?

Category: Custom IC Design

By rawrakesh

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updated over 6 years ago by Andrew Beckett

1 replies • 15730 views
Discussion

Parameter sweep in layout and running extraction

Category: Custom IC Design

By Emiel

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updated over 6 years ago by Andrew Beckett

3 replies • 15666 views
Discussion

Error in running HSPICE NETLIST using cadence virtuoso ADE L

Category: Custom IC Design

By Chandu D

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updated over 6 years ago by Chandu D

2 replies • 18770 views
Discussion

functional mismatch of pre and post layout simulation results

Category: Custom IC Design

By abhi21

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updated over 6 years ago by Andrew Beckett

1 replies • 15401 views
Discussion

[Virtuoso] What is wrong with my RC transient simulation ?

Category: Custom IC Design

By Leey

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updated over 6 years ago by Leey

5 replies • 17483 views
Discussion

CalcVal

Category: Custom IC Design

By Pyroblast

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updated over 6 years ago by Andrew Beckett

1 replies • 14297 views
Discussion

spectre.out file in psf directory

Category: Custom IC Design

By nicola91it

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updated over 6 years ago by Andrew Beckett

3 replies • 18333 views
Discussion

Verilog-A Oscillator Phase noise

Category: Custom IC Design

By sherifali

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started over 6 years ago

0 replies • 14287 views
Discussion

Issue with multiple QRC runs

Category: Custom IC Design

By Suryansh Singh

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updated over 6 years ago by Suryansh Singh

2 replies • 14098 views

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