Custom IC Design

Latest Posts

Discussion

Any bindkey to run "netlist -> recreate"?

Category: Custom IC Design

By sjwprcker

$usertype
•
updated over 4 years ago by sjwprcker

4 replies • 1633 views
Discussion

Suppress: *WARNING* COMBINE attribute library not defined

Category: Custom IC Design

By Aldo2

$usertype
•
updated over 4 years ago by Andrew Beckett

18 replies • 24387 views
Discussion

ADE Explorer - Spec Pass/Fail

Category: Custom IC Design

By life

$usertype
•
updated over 4 years ago by life

1 replies • 2442 views
Discussion

Update W/L number in instance property, but resistor "r "value isn't change accordingly

Category: Custom IC Design

By ringamp

$usertype
•
updated over 4 years ago by ringamp

2 replies • 2383 views
Discussion

Can I use a variable as interpolation point in the value function?

Category: Custom IC Design

By maaz2020

$usertype
•
updated over 4 years ago by maaz2020

5 replies • 14854 views
Discussion

Verilog-AMS Simulation speed issue while using $table_model for reading from a file.

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 11041 views
Discussion

How to pass a real array as an input argument to a function in Verilog (in AMS simulation)

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 4 years ago by RFStuff

2 replies • 12390 views
Discussion

Restrict ICPR SGE Job to only run 1 simulation point (ADE Assembler)

Category: Custom IC Design

By jehh

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 12091 views
Discussion

How can I fix the error in my simulation?

Category: Custom IC Design

By yysunj

$usertype
•
updated over 4 years ago by Andrew Beckett

3 replies • 12744 views
Discussion

Using FinFETs in OrCAD Capture

Category: Custom IC Design

By Sati

$usertype
•
updated over 4 years ago by Sati

2 replies • 11513 views
Discussion

Question on PSS+PNoise simulation for a Track and Hold circuit

Category: Custom IC Design

By YutaoLiu

$usertype
•
updated over 4 years ago by Andrew Beckett

11 replies • 14795 views
Discussion

Post Layout simulation for multi-finger transistors

Category: Custom IC Design

By Senan

$usertype
•
updated over 4 years ago by FormerMember

11 replies • 15958 views
Discussion

noise sim always report 0% of Total

Category: Custom IC Design

By monglebest

$usertype
•
updated over 4 years ago by Andrew Beckett

8 replies • 14019 views
Discussion

Working model for MDL language - A query

Category: Custom IC Design

By MicheleAncis

$usertype
•
updated over 4 years ago by FormerMember

2 replies • 1918 views
Discussion

Adding wreal input and output bus in verilog-AMS

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 4 years ago by RFStuff

5 replies • 15905 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.