• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    Dac verilog ams output FFT plot issue

    Category: Custom IC Design

    By sidm

    $usertype

    •

    updated over 4 years ago by sidm

    9 replies • 14261 views
  • Discussion

    Instancing schematics in veriloga (or any other analog HDL)

    Category: Custom IC Design

    By BillH314

    $usertype

    •

    started over 4 years ago

    0 replies • 10971 views
  • Discussion

    issue with extracted s parameter from EMX intergrand

    Category: Custom IC Design

    By tawsaras

    $usertype

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 12046 views
  • Discussion

    How can I solve ERROR (SFE-23) at my circuit simulaton?

    Category: Custom IC Design

    By yysunj

    $usertype

    •

    updated over 4 years ago by yysunj

    8 replies • 21964 views
  • Discussion

    About DC op point and DC sweep

    Category: Custom IC Design

    By ichiro

    $usertype

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 11765 views
  • Discussion

    How to store all actual values into layout cells

    Category: Custom IC Design

    By leok

    $usertype

    •

    started over 4 years ago

    0 replies • 10810 views
  • Discussion

    Problem defining REGION plot with DCsweep in ADE EXPLORER

    Category: Custom IC Design

    By robert 21

    $usertype

    •

    started over 4 years ago

    0 replies • 10676 views
  • Discussion

    What does "Drain diffusion res squares, Source diffusion res squares, estimated operating region, thermal resistance, num of segments, and thermal capacitance" mean in analogLib's ntft?

    Category: Custom IC Design

    By yysunj

    $usertype

    •

    updated over 4 years ago by yysunj

    5 replies • 3801 views
  • Discussion

    How can I get equivalent circuit of BSIM-BULK model

    Category: Custom IC Design

    By yysunj

    $usertype

    •

    updated over 4 years ago by yysunj

    5 replies • 13506 views
  • Discussion

    Simulation is getting stuck when running AMS simulation with SimVision

    Category: Custom IC Design

    By RFStuff

    $usertype

    •

    updated over 4 years ago by RFStuff

    2 replies • 13044 views
  • Discussion

    simulation for different temperature of parts

    Category: Custom IC Design

    By Hannahyrh

    $usertype

    •

    updated over 4 years ago by Hannahyrh

    2 replies • 13010 views
  • Discussion

    Compilation error of verilogAMS --> ncvlog: *F,DLCSYN Syntax error 'DEFINE NCSIMRC

    Category: Custom IC Design

    By RFStuff

    $usertype

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 2798 views
  • Discussion

    ERROR (VACOMP-1008):

    Category: Custom IC Design

    By mvinodh58

    $usertype

    •

    updated over 4 years ago by Andrew Beckett

    7 replies • 15915 views
  • Discussion

    Where can I get BSIM-BULK

    Category: Custom IC Design

    By yysunj

    $usertype

    •

    updated over 4 years ago by yysunj

    2 replies • 11453 views
  • Discussion

    Schematic Bus Signal only every nth net

    Category: Custom IC Design

    By patschouly

    $usertype

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 12601 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information