Custom IC Design

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Discussion

Need to get routing layers info from tech db

Category: Custom IC Design

By Utkarsh03

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updated over 4 years ago by Utkarsh03

4 replies • 12363 views
Discussion

Monte carlo simulation error (no process variations were specified in the statistics block)

Category: Custom IC Design

By Afshin Amoo

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updated over 4 years ago by Afshin Amoo

2 replies • 15094 views
Discussion

oppoint using verilog a

Category: Custom IC Design

By Yea Chul

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updated over 4 years ago by Andrew Beckett

2 replies • 12039 views
Discussion

plotting loop gain in ADE Assembler

Category: Custom IC Design

By robert 21

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updated over 4 years ago by Andrew Beckett

4 replies • 14120 views
Discussion

implement noise behavior of transistor in spice code in spectre

Category: Custom IC Design

By Bo Yu

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updated over 4 years ago by Andrew Beckett

3 replies • 13168 views
Discussion

CCCS - controlling element not available

Category: Custom IC Design

By shlomo34

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updated over 4 years ago by shlomo34

4 replies • 3826 views
Discussion

Built-in aging model in TSMC PDK

Category: Custom IC Design

By FormerMember

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updated over 4 years ago by Andrew Beckett

3 replies • 4863 views
Discussion

ADE XL Monte Carlo analysis: statistical results are not available

Category: Custom IC Design

By Mike Tian

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updated over 4 years ago by KhanAmir

25 replies • 31242 views
Discussion

Reading IC5033 schematic in IC6.1.6 ?

Category: Custom IC Design

By Anon481

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updated over 4 years ago by Andrew Beckett

4 replies • 11737 views
Discussion

Dac verilog ams output FFT plot issue

Category: Custom IC Design

By sidm

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updated over 4 years ago by sidm

9 replies • 13717 views
Discussion

Instancing schematics in veriloga (or any other analog HDL)

Category: Custom IC Design

By BillH314

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started over 4 years ago

0 replies • 10641 views
Discussion

issue with extracted s parameter from EMX intergrand

Category: Custom IC Design

By tawsaras

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updated over 4 years ago by Andrew Beckett

1 replies • 11642 views
Discussion

How can I solve ERROR (SFE-23) at my circuit simulaton?

Category: Custom IC Design

By yysunj

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updated over 4 years ago by yysunj

8 replies • 21152 views
Discussion

About DC op point and DC sweep

Category: Custom IC Design

By ichiro

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updated over 4 years ago by Andrew Beckett

1 replies • 11420 views
Discussion

How to store all actual values into layout cells

Category: Custom IC Design

By leok

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started over 4 years ago

0 replies • 10483 views

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