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Custom IC Design

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  • Discussion

    Label created in an unknown layer

    Category: Custom IC Design

    By delgsy

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    updated over 3 years ago by Andrew Beckett

    3 replies • 9699 views
  • Discussion

    Running Spectre simulation and then plotting in ViVA by using system() command from MATLAB

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 3 years ago by RFStuff

    6 replies • 11311 views
  • Discussion

    Changing names of multiple nets connected to a unique pin name

    Category: Custom IC Design

    By ud7842

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    updated over 3 years ago by Andrew Beckett

    3 replies • 11684 views
  • Discussion

    Clear/close a 'running' ADE-XL

    Category: Custom IC Design

    By TempViator

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    •

    updated over 3 years ago by FormerMember

    7 replies • 5025 views
  • Discussion

    inductor LVS and netlisting

    Category: Custom IC Design

    By Karev11

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    •

    updated over 3 years ago by Andrew Beckett

    5 replies • 11250 views
  • Discussion

    Keysight ADS schematic into Virtuoso

    Category: Custom IC Design

    By sidm

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    •

    updated over 3 years ago by sidm

    2 replies • 10079 views
  • Discussion

    Can Verilog-A macro names be swept in Corners Setup of ADE Assembler for Spectre simulations?

    Category: Custom IC Design

    By csn165309964

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    updated over 3 years ago by Andrew Beckett

    2 replies • 9320 views
  • Discussion

    Missing Corner Setups ADE Explorer

    Category: Custom IC Design

    By Kevin Buck

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    •

    updated over 3 years ago by Kevin Buck

    2 replies • 9853 views
  • Discussion

    Monte Carlo Simulation Results Canceled

    Category: Custom IC Design

    By ZpyIC123

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 8732 views
  • Discussion

    Layers visibility issue in hierarchical layout design

    Category: Custom IC Design

    By Senan

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    •

    updated over 3 years ago by Senan

    2 replies • 9061 views
  • Discussion

    converting an analog signal into digital and saving the formula on the ADE outputs

    Category: Custom IC Design

    By TommasoF

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    updated over 3 years ago by TommasoF

    2 replies • 12585 views
  • Discussion

    automatic routing using specific metal layer

    Category: Custom IC Design

    By delgsy

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 9908 views
  • Discussion

    How to add dyn_floatdcpath into ADE

    Category: Custom IC Design

    By zzhu

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 8942 views
  • Discussion

    is there something like "Net Highlighting" in the layout?

    Category: Custom IC Design

    By delgsy

    $usertype

    •

    updated over 3 years ago by delgsy

    2 replies • 2610 views
  • Discussion

    Importing Digital Standard Cells from PDK data

    Category: Custom IC Design

    By Matthias Ochs

    $usertype

    •

    started over 3 years ago

    0 replies • 9912 views
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