Custom IC Design

Latest Posts

Discussion

Stimulating an internal node from a higher hierarchy level

Category: Custom IC Design

By Johanny Saenz

$usertype
•
updated over 3 years ago by Andrew Beckett

5 replies • 10911 views
Discussion

Running Monte Carlo simulations on a statistical corner in ADE XL

Category: Custom IC Design

By ddsab

$usertype
•
updated over 3 years ago by Andrew Beckett

3 replies • 15964 views
Discussion

Joining a line between two points on the output waveform in Cadence Virtuoso calculator tool

Category: Custom IC Design

By Senan

$usertype
•
updated over 3 years ago by Senan

2 replies • 11026 views
Discussion

DC operating point for different analyses

Category: Custom IC Design

By Banai

$usertype
•
updated over 3 years ago by Banai

4 replies • 14103 views
Discussion

Parasitic extraction tools for Cadence

Category: Custom IC Design

By omiya

$usertype
•
updated over 3 years ago by omiya

2 replies • 11893 views
Discussion

how to add printf statement to .cdsenv file?

Category: Custom IC Design

By KurtKimber1

$usertype
•
updated over 3 years ago by KurtKimber1

4 replies • 10142 views
Discussion

Print Noise summary and corresponding OCEAN noiseSummary

Category: Custom IC Design

By AncisMichele

$usertype
•
updated over 3 years ago by AncisMichele

15 replies • 15750 views
Discussion

Can the stb simulation in Spectre calculate the negative phase margin?

Category: Custom IC Design

By zuiying

$usertype
•
updated over 3 years ago by zuiying

11 replies • 17678 views
Discussion

Several problems with interfacing Spectre through Matlab

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 3 years ago by Andrew Beckett

1 replies • 5013 views
Discussion

Prevent Maestro from reporting undefined design variables

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 3 years ago by FormerMember

3 replies • 4742 views
Discussion

5G signal sources and simulation inside Spectre / Virtuoso

Category: Custom IC Design

By sidm

$usertype
•
updated over 3 years ago by Andrew Beckett

11 replies • 14653 views
Discussion

DRC Error Using Assura

Category: Custom IC Design

By omiya

$usertype
•
updated over 3 years ago by Andrew Beckett

3 replies • 11689 views
Discussion

global pins

Category: Custom IC Design

By abdurrahman0234

$usertype
•
started over 3 years ago

0 replies • 8913 views
Discussion

Are there any rules and techniques for setting the accuracy and step length when performing transient simulation of unstable systems (that is, the transfer function has RHP) in Spectre?

Category: Custom IC Design

By zuiying

$usertype
•
updated over 3 years ago by zuiying

2 replies • 12225 views
Discussion

Spectre gives different DC simulation results for the same circuit (even some results don't satisfy KCL)

Category: Custom IC Design

By zuiying

$usertype
•
updated over 3 years ago by zuiying

2 replies • 3048 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.