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Custom IC Design

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  • Discussion

    How to make sure Pnoise is giving correct results?

    Category: Custom IC Design

    By HnArd

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    updated over 2 years ago by ShawnLogan

    3 replies • 8238 views
  • Discussion

    Cannot Create an auto pin

    Category: Custom IC Design

    By nienjt

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    started over 2 years ago

    0 replies • 6620 views
  • Discussion

    Parasitic capacitance of the drain of abutted transistors apparently counted twice in post-layout simulation

    Category: Custom IC Design

    By massbarb

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    updated over 2 years ago by massbarb

    3 replies • 8820 views
  • Discussion

    How To Add Arguments to systemVerilog Extraction

    Category: Custom IC Design

    By YB36

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    started over 2 years ago

    0 replies • 7543 views
  • Discussion

    Reliability Analysis Tutorial

    Category: Custom IC Design

    By illaoi

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    updated over 2 years ago by ShawnLogan

    1 replies • 8834 views
  • Discussion

    Using 'temperature' as a design variable breaks calcVal functionality

    Category: Custom IC Design

    By Kevin Buck

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    updated over 2 years ago by Kevin Buck

    1 replies • 1827 views
  • Discussion

    FET Noise in BSIM4

    Category: Custom IC Design

    By illaoi

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    updated over 2 years ago by ShawnLogan

    4 replies • 9284 views
  • Discussion

    Unable to change reference of library from cdsDefTechLib to actual pdk

    Category: Custom IC Design

    By sidm

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    updated over 2 years ago by Andrew Beckett

    3 replies • 9155 views
  • Discussion

    common mode level in vcvs

    Category: Custom IC Design

    By paulinho

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    updated over 2 years ago by Andrew Beckett

    2 replies • 10731 views
  • Discussion

    VerilogA - command: $root

    Category: Custom IC Design

    By rrihak

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    updated over 2 years ago by MarcelAhmedzai

    1 replies • 1101 views
  • Discussion

    Measuring across corners or parameters, then equation using results

    Category: Custom IC Design

    By TempViator

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    updated over 2 years ago by amac

    1 replies • 8397 views
  • Discussion

    Whether virtuoso only loads the first .cdsinit file it finds

    Category: Custom IC Design

    By lightyear

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    updated over 2 years ago by lightyear

    2 replies • 8609 views
  • Discussion

    Differce between IC5 & IC6 in pnoise simulation(jitter)

    Category: Custom IC Design

    By HsiuMin

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    updated over 2 years ago by ShawnLogan

    1 replies • 1270 views
  • Discussion

    How to measure transient current in simulation.

    Category: Custom IC Design

    By RSIDesignEngineer

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    •

    updated over 2 years ago by ShawnLogan

    4 replies • 8494 views
  • Discussion

    Getting the absolute max value using the calculator

    Category: Custom IC Design

    By KasperM

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    •

    updated over 2 years ago by ShawnLogan

    5 replies • 12238 views
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