Custom IC Design

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Discussion

Virtuoso Strmout of selected cells

Category: Custom IC Design

By Stevemc12

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updated over 12 years ago by Andrew Beckett

3 replies • 15163 views
Discussion

ADE XL job dispatch behavior (LSF)

Category: Custom IC Design

By kentauta

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updated over 12 years ago by Andrew Beckett

1 replies • 14908 views
Discussion

Force ams netlister to skip ports/pins

Category: Custom IC Design

By Runner

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updated over 12 years ago by Andrew Beckett

1 replies • 1008 views
Discussion

How to attach the cdl netlist with cdl view

Category: Custom IC Design

By scorashu

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updated over 12 years ago by Andrew Beckett

1 replies • 19190 views
Discussion

DRC and LVS error

Category: Custom IC Design

By samanehrh

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updated over 12 years ago by Andrew Beckett

1 replies • 13473 views
Discussion

Have problem in simulating circuit in virtuoso ADE

Category: Custom IC Design

By sunilreddy

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updated over 12 years ago by Andrew Beckett

3 replies • 13723 views
Discussion

Resistor transient noise issues with spectre

Category: Custom IC Design

By samini

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updated over 12 years ago by Andrew Beckett

1 replies • 14077 views
Discussion

spectre nested sweep in MC run fails to "export" expression

Category: Custom IC Design

By kxlux

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updated over 12 years ago by Andrew Beckett

11 replies • 6594 views
Discussion

ADE-XL/Spectre unobtrusive stb with iprobe

Category: Custom IC Design

By daasboe

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updated over 12 years ago by Andrew Beckett

1 replies • 2146 views
Discussion

Error (VACOM-1008) - Cannot compile ahdlcmi module library (MMSIM.07.11)

Category: Custom IC Design

By samini

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updated over 12 years ago by Andrew Beckett

7 replies • 4690 views
Discussion

Mapping a 'cv~>prop' array with any other array

Category: Custom IC Design

By shazzy

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updated over 12 years ago by Andrew Beckett

4 replies • 1504 views
Discussion

Parallel simulation with Cadence

Category: Custom IC Design

By Monady

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updated over 12 years ago by Andrew Beckett

8 replies • 16377 views
Discussion

How to create a voltage dependent resistor and capacitor in cadence?

Category: Custom IC Design

By chaosatom

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updated over 12 years ago by Marc Heise

1 replies • 14766 views
Discussion

Problem in viewing grid during Layout

Category: Custom IC Design

By Jithin

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updated over 12 years ago by skillUser

3 replies • 15869 views
Discussion

Run Assura DRC

Category: Custom IC Design

By ErezBS

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updated over 12 years ago by Marc Heise

1 replies • 14289 views

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