• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    Using a PSpice advanced part into a subcircuit

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12528 views
  • Discussion

    Resistor label/pin problem

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 2582 views
  • Discussion

    Drawing circles in Virtuoso

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    5 replies • 17295 views
  • Discussion

    DRC error AMTS maximum MTOP spacing

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 14421 views
  • Discussion

    Isn't the Library Manager actually the problem with DM?

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    3 replies • 2075 views
  • Discussion

    how to autofill a layout ??!

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 13637 views
  • Discussion

    Using spice in cadence

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 14356 views
  • Discussion

    cdlIn problems

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    13 replies • 20326 views
  • Discussion

    ICS1526

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12683 views
  • Discussion

    Tip of the Week: Toggle quickly between cellviews and editors

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12564 views
  • Discussion

    layout density check with Diva.

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12848 views
  • Discussion

    parasitic resistance extract minimum value

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 13140 views
  • Discussion

    Non-linear Poly-2 Resistor in CMOS 0.35um VIS(Vanguard-TSMC)

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 764 views
  • Discussion

    how to specify MAXRSD value during transient simulation

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 13097 views
  • Discussion

    nport Issue

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    3 replies • 15364 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information