Custom IC Design

Latest Posts

Discussion

Noise summary data per sub-block in Maestro output expressions

Category: Custom IC Design

By DKaraca
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started 10 months ago

0 replies • 2288 views
Discussion

Bind Key for Changing Multiple Layout Grid Controls

Category: Custom IC Design

By sgcad
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updated 10 months ago by sgcad

4 replies • 3209 views
Discussion

The best tool to batch run AMS is "runams"?

Category: Custom IC Design

By SpiceMonkey
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started 10 months ago

0 replies • 357 views
Discussion

Edit assert in Checks/Asserts assistant

Category: Custom IC Design

By amac
•
updated 10 months ago by Andrew Beckett

3 replies • 1137 views
Discussion

How to Automatically Print Design Checks/Asserts in Simulation in Virtuoso Assembler by Default

Category: Custom IC Design

By baltaci
•
updated 10 months ago by baltaci

2 replies • 748 views
Discussion

Space key not working in virtuoso layout

Category: Custom IC Design

By kalikrishna
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updated 10 months ago by Andrew Beckett

1 replies • 2387 views
Discussion

Maestro - Intersymbol Interference (ISI) Jitter measurement

Category: Custom IC Design

By firebolt3
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updated 10 months ago by Andrew Beckett

2 replies • 760 views
Discussion

Viva XL can only display waveform of the first run of a spectremdl sweep

Category: Custom IC Design

By NightOwlPoppy
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updated 10 months ago by NightOwlPoppy

4 replies • 3263 views
Discussion

Capacitor Shown with Red 'X' in Layout for TSMC65 pdk

Category: Custom IC Design

By SM20240729856
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updated 10 months ago by SM20240729856

2 replies • 931 views
Discussion

Behavioral modeling of clock gating for efficient analog simulations (Spectre)

Category: Custom IC Design

By ItsMichael
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updated 10 months ago by Alonso Schmidt

1 replies • 2595 views
Discussion

Migration to new operating system and force compiled model recompile

Category: Custom IC Design

By JayBee
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updated 10 months ago by TomasMelander

7 replies • 4479 views
Discussion

Move Metal offgrid back on grid

Category: Custom IC Design

By TobyK
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updated 10 months ago by RobMan

1 replies • 2395 views
Discussion

Some error while running Quantus(Assura) Parasitc extraction run form

Category: Custom IC Design

By Sameerpy
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started 10 months ago

0 replies • 572 views
Discussion

How can I simulate based on the random mismatch generated by a previous Monte Carlo iteration?

Category: Custom IC Design

By AW202410094823
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updated 10 months ago by AW202410094823

2 replies • 2546 views
Discussion

Quantus Coupled vs Decoupled Parasitic Extraction Results

Category: Custom IC Design

By Aida
•
updated 10 months ago by Aida

2 replies • 3229 views

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