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Custom IC Design

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  • Discussion

    How do I re-load the .cadence directory via SKILL w/o restarting a session?

    Category: Custom IC Design

    By Julia Julia

    •

    updated over 11 years ago by Julia

    4 replies • 1628 views
  • Discussion

    How to write the expression for two currents' signal and plot them with Temperature

    Category: Custom IC Design

    By bhl3302 bhl3302

    •

    updated over 11 years ago by bhl3302

    2 replies • 7292 views
  • Discussion

    problem: W and L of a transistor not shown in edit-> object-> properties

    Category: Custom IC Design

    By apple419 apple419

    •

    updated over 11 years ago by beny

    3 replies • 2024 views
  • Discussion

    Histograms not showing in MC Analysis

    Category: Custom IC Design

    By Flyyn Rider Flyyn Rider

    •

    updated over 11 years ago by Flyyn Rider

    1 replies • 13216 views
  • Discussion

    Regarding Smoothness in transient analysis

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 11 years ago by Andrew Beckett

    6 replies • 15572 views
  • Discussion

    Layout pin problem: net name distributes via transistor

    Category: Custom IC Design

    By jeffreyprin jeffreyprin

    •

    started over 11 years ago

    0 replies • 13914 views
  • Discussion

    Is there a way in Verilog-A to know if transient noise analysis is run?

    Category: Custom IC Design

    By SharksFan SharksFan

    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 14668 views
  • Discussion

    switching between spectre and mmsim

    Category: Custom IC Design

    By NcfC NcfC

    •

    updated over 11 years ago by NcfC

    4 replies • 15021 views
  • Discussion

    axlExportOutputView creates an empty file

    Category: Custom IC Design

    By adeuser777 adeuser777

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 13215 views
  • Discussion

    converting verilog to SPICE netlist

    Category: Custom IC Design

    By govind2306 govind2306

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 19960 views
  • Discussion

    Error in MMSIM when executing on 64bit machine

    Category: Custom IC Design

    By Arslan Arslan

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 13569 views
  • Discussion

    Spectre adexl results to sdb/pcf file?

    Category: Custom IC Design

    By DeepG DeepG

    •

    started over 11 years ago

    0 replies • 740 views
  • Discussion

    Abstract Generation Crashes during Step pins in a given cell

    Category: Custom IC Design

    By jorenrefuerzo jorenrefuerzo

    •

    updated over 11 years ago by ColinSutlieff

    1 replies • 12972 views
  • Discussion

    Solving a differential equation using VerilogA Model

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    started over 11 years ago

    0 replies • 13957 views
  • Discussion

    GaN Gate Drivers

    Category: Custom IC Design

    By Hamzeh Hamzeh

    •

    updated over 12 years ago by Hamzeh

    2 replies • 14037 views
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