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Custom IC Design

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  • Discussion

    Use expression from one test as design variable in another test

    Category: Custom IC Design

    By franzi

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    updated over 12 years ago by Andrew Beckett

    2 replies • 15439 views
  • Discussion

    Update output list

    Category: Custom IC Design

    By Yassien

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    •

    updated over 12 years ago by Yassien

    9 replies • 15923 views
  • Discussion

    spectre sweep statement vs. Ocean parametric analysis

    Category: Custom IC Design

    By T Opperman

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    updated over 12 years ago by Andrew Beckett

    1 replies • 15646 views
  • Discussion

    An error with Momentum S parameter blocks in Spectre

    Category: Custom IC Design

    By JoshK

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    •

    updated over 12 years ago by Andrew Beckett

    7 replies • 17462 views
  • Discussion

    qrc extraction of single components and netset.

    Category: Custom IC Design

    By Zitty

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    •

    updated over 12 years ago by Quek

    1 replies • 13781 views
  • Discussion

    Exporting manufactured interconnect geometry including DFM effects

    Category: Custom IC Design

    By ArnoSetagaya

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    •

    updated over 12 years ago by Quek

    1 replies • 13828 views
  • Discussion

    Terminal Mismatch for MOS_a2d in virtuoso

    Category: Custom IC Design

    By Arslan

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    updated over 12 years ago by Andrew Beckett

    2 replies • 14042 views
  • Discussion

    model name for normal diode in virtuoso shematic editor

    Category: Custom IC Design

    By madhusudha

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    updated over 12 years ago by diode model

    6 replies • 23812 views
  • Discussion

    Which noise does param 'sh' stand for in ADE noise summary?

    Category: Custom IC Design

    By Raveesh

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    updated over 12 years ago by Andrew Beckett

    3 replies • 14177 views
  • Discussion

    IC5141 - LEFOut failed.

    Category: Custom IC Design

    By kb how

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    •

    updated over 12 years ago by kb how

    6 replies • 2689 views
  • Discussion

    Another unique veriloga filename question

    Category: Custom IC Design

    By ricez

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    •

    updated over 12 years ago by ricez

    2 replies • 14527 views
  • Discussion

    Flightlines in Layout XL

    Category: Custom IC Design

    By pham777

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    •

    updated over 12 years ago by pham777

    2 replies • 16809 views
  • Discussion

    How to ignore some minor dots in streaming out the gds file

    Category: Custom IC Design

    By SUEE

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    •

    updated over 12 years ago by Andrew Beckett

    8 replies • 15918 views
  • Discussion

    Schematic view settings in cdsenv

    Category: Custom IC Design

    By Abhilash B

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    •

    updated over 12 years ago by theopaone

    3 replies • 16293 views
  • Discussion

    Trigger warning on sessioin start

    Category: Custom IC Design

    By wgtkan

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    •

    updated over 12 years ago by Andrew Beckett

    4 replies • 15692 views
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