Custom IC Design

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PLL + PSS + PNOISE convergence

Category: Custom IC Design

By HoWei

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updated over 4 years ago by FormerMember

17 replies • 28021 views
Discussion

How to treat parasitic device as open for LVS

Category: Custom IC Design

By brianbranch

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updated over 4 years ago by Andrew Beckett

1 replies • 11633 views
Discussion

WARNING (OCN-6038) Results dc are not available loading OCEAN script

Category: Custom IC Design

By Victor Camacho

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updated over 4 years ago by Andrew Beckett

3 replies • 12967 views
Discussion

Report CPU time directly in ADE Assembler

Category: Custom IC Design

By jehh

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updated over 4 years ago by Frank Wiedmann

3 replies • 10969 views
Discussion

Plotting phase spectrum

Category: Custom IC Design

By sidt

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updated over 4 years ago by sidt

2 replies • 15204 views
Discussion

Post Layout simulation accuracy

Category: Custom IC Design

By Fatima65

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updated over 4 years ago by Frank Wiedmann

7 replies • 15304 views
Discussion

Virtuoso Cadence crashes when opening layout viewer

Category: Custom IC Design

By Eric2020

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updated over 4 years ago by Andrew Beckett

1 replies • 11592 views
Discussion

How can I enlarge the result window in the horizontal axis direction?

Category: Custom IC Design

By yysunj

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updated over 4 years ago by Andrew Beckett

1 replies • 11019 views
Discussion

Abstract Generator : ERROR (ABS-20024)

Category: Custom IC Design

By Chan ho

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updated over 4 years ago by Andrew Beckett

1 replies • 10973 views
Discussion

How can I save the converged values at the nodes after the last iteration of the time step in verilog-A?

Category: Custom IC Design

By rhanna

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updated over 4 years ago by rhanna

6 replies • 12507 views
Discussion

Time domain simulation of switched capacitor circuits

Category: Custom IC Design

By Svilen64

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updated over 4 years ago by Andrew Beckett

1 replies • 11481 views
Discussion

How to netlist a VHDL-AMS generic of type "time" correctly in ADE?

Category: Custom IC Design

By Eckhard Hennig

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updated over 4 years ago by Andrew Beckett

2 replies • 2230 views
Discussion

save graphical waveforms into ADE-XL views just like a spectre state view

Category: Custom IC Design

By PBWU

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updated over 4 years ago by Andrew Beckett

3 replies • 13586 views
Discussion

How to set a pre-run MC simulation

Category: Custom IC Design

By Hannahyrh

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updated over 4 years ago by Andrew Beckett

1 replies • 11063 views
Discussion

hex variable to verilog module

Category: Custom IC Design

By amacSS

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updated over 4 years ago by amacSS

6 replies • 15482 views

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