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Custom IC Design

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  • Discussion

    SAVING net VOLTAGE and pin CURRENTS at block level and also saving current in the mos transistors pins in EXTRACTED view

    Category: Custom IC Design

    By Pyroblast

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    updated over 6 years ago by RiadKaced

    5 replies • 23055 views
  • Discussion

    ADEXL:priority of jobs/runs

    Category: Custom IC Design

    By cato

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    updated over 6 years ago by cato

    2 replies • 1822 views
  • Discussion

    Regarding Simulation time in nc-verilog and in ADE-L/XL + AMS

    Category: Custom IC Design

    By RFStuff

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    updated over 6 years ago by RiadKaced

    2 replies • 1221 views
  • Discussion

    How to solve the LVS error :"unable to descend into any of the views defined in the view list"

    Category: Custom IC Design

    By Justing

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    updated over 6 years ago by Justing

    9 replies • 8506 views
  • Discussion

    Spectre Error during Monte-Carlo

    Category: Custom IC Design

    By ajbluestone

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    •

    updated over 6 years ago by ajbluestone

    2 replies • 16386 views
  • Discussion

    Using system gcc instead the MMSIM one during ahdlcmi compilation

    Category: Custom IC Design

    By Johanny Saenz

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    •

    updated over 6 years ago by Andrew Beckett

    3 replies • 15362 views
  • Discussion

    Transient Current Noise vs AC current noise

    Category: Custom IC Design

    By JHansrani

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    updated over 6 years ago by Andrew Beckett

    2 replies • 13902 views
  • Discussion

    Using vcvs as delay elements result in period signal rising and falling time changing

    Category: Custom IC Design

    By xianweng

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    updated over 6 years ago by Andrew Beckett

    2 replies • 15579 views
  • Discussion

    How to add a probe color of choice in schematic Editor

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 6 years ago by Andrew Beckett

    1 replies • 15739 views
  • Discussion

    How I can declare a thermodecoder variable in a vcd file

    Category: Custom IC Design

    By georgekasa

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    updated over 6 years ago by Andrew Beckett

    1 replies • 13367 views
  • Discussion

    Label inside a clone

    Category: Custom IC Design

    By RVERP

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    •

    updated over 6 years ago by Andrew Beckett

    4 replies • 14195 views
  • Discussion

    Capturing data transition time stamp of the a Wave viewed in SimVision

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 6 years ago by Andrew Beckett

    3 replies • 16592 views
  • Discussion

    Calculate DNL of a DAC in Cadence

    Category: Custom IC Design

    By HasanAr

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    •

    updated over 6 years ago by HasanAr

    2 replies • 19184 views
  • Discussion

    Error coming up when trying to do DRC and Extraction in CADENCE with AMS design kit

    Category: Custom IC Design

    By vaishakprathap

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    •

    updated over 6 years ago by vaishakprathap

    2 replies • 13778 views
  • Discussion

    Input Capacitance Characterization in Cadence Liberate

    Category: Custom IC Design

    By anurans

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    •

    updated over 6 years ago by anurans

    26 replies • 31536 views
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