Custom IC Design

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Discussion

stb and tran analysis discrepancy

Category: Custom IC Design

By FormerMember

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updated over 8 years ago by FormerMember

1 replies • 1458 views
Discussion

[Solved] Unbound pins when running Assura LVS in Virtuoso Layout Suite L

Category: Custom IC Design

By dpalomeq

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updated over 8 years ago by dpalomeq

8 replies • 21672 views
Discussion

ADE: Use of nested design variables in output expressions

Category: Custom IC Design

By sommer

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updated over 8 years ago by Andrew Beckett

3 replies • 16702 views
Discussion

Access simulation data with OCEAN command getResult() / method description of classType famLeafAnalysis

Category: Custom IC Design

By sommer

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started over 8 years ago

0 replies • 13158 views
Discussion

How to set different accuracy settings for different time periods in transient simulation.

Category: Custom IC Design

By vamshiky

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updated over 8 years ago by Andrew Beckett

6 replies • 24486 views
Discussion

Corner Simulations of Multiple Test with dependent variables in ADE-XL

Category: Custom IC Design

By Skyler17

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updated over 8 years ago by Andrew Beckett

1 replies • 14202 views
Discussion

parametrized netlist generation at scale

Category: Custom IC Design

By miwe

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updated over 8 years ago by miwe

4 replies • 16427 views
Discussion

Only part of transient time displayed.

Category: Custom IC Design

By syafiq

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updated over 8 years ago by syafiq

1 replies • 13256 views
Discussion

DC convergence problem

Category: Custom IC Design

By AmeliAmeli

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updated over 8 years ago by Johanny Saenz

2 replies • 21450 views
Discussion

Manufacturing grid/ Routing grid

Category: Custom IC Design

By Cristina Ibane

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updated over 8 years ago by Andrew Beckett

3 replies • 16152 views
Discussion

TO select all mosaics in visible area

Category: Custom IC Design

By Sampatcharu

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updated over 8 years ago by Sampatcharu

2 replies • 13707 views
Discussion

integrate ansys Electromagnetic Suite 16 problem

Category: Custom IC Design

By rockyicer

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updated over 8 years ago by Andrew Beckett

7 replies • 17493 views
Discussion

Regarding verilogA model of a discrete time delay free integrator

Category: Custom IC Design

By VivekNITg

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updated over 8 years ago by Andrew Beckett

1 replies • 16601 views
Discussion

Relxpert prebert error

Category: Custom IC Design

By Amel

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updated over 8 years ago by Andrew Beckett

7 replies • 16259 views
Discussion

transistor model - netlist - spectre - matlab

Category: Custom IC Design

By AmeliAmeli

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updated over 8 years ago by Andrew Beckett

1 replies • 1501 views

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