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Custom IC Design

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  • Discussion

    Updated Resistor Parameters Not Displayed

    Category: Custom IC Design

    By amssshubham

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    updated over 3 years ago by Andrew Beckett

    1 replies • 9034 views
  • Discussion

    Improving Virtuoso Speed

    Category: Custom IC Design

    By patschouly

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    updated over 3 years ago by Andrew Beckett

    2 replies • 16222 views
  • Discussion

    How to resurrect Virtuoso schematic and export

    Category: Custom IC Design

    By AsicMax

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    updated over 3 years ago by FormerMember

    1 replies • 9934 views
  • Discussion

    DFT expression results each in separate subwindow in ADE Assembler

    Category: Custom IC Design

    By chrisindallastx

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    •

    updated over 3 years ago by chrisindallastx

    2 replies • 9538 views
  • Discussion

    How can I generate schematic of standard cell using standard cell library data given by foundry in Virtuoso?

    Category: Custom IC Design

    By ADITYA56

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    updated over 3 years ago by Kian Boon

    6 replies • 19280 views
  • Discussion

    how to set flight line that is just indicating the connections about the node on schematic

    Category: Custom IC Design

    By ichiro

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    •

    updated over 3 years ago by Andrew Beckett

    4 replies • 13402 views
  • Discussion

    What is the Assembler equivalent of loading save output state in ADEXL?

    Category: Custom IC Design

    By BillH314

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    updated over 3 years ago by BillH314

    4 replies • 10522 views
  • Discussion

    Strange sharp rise/fall in stb phase plot

    Category: Custom IC Design

    By SpiceMonkey

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    updated over 3 years ago by SpiceMonkey

    4 replies • 2891 views
  • Discussion

    Saving more parameters of MOSFET during transient simulation

    Category: Custom IC Design

    By dragank

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    updated over 3 years ago by dragank

    2 replies • 10646 views
  • Discussion

    Transient plot of broken asserts

    Category: Custom IC Design

    By dragank

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    updated over 3 years ago by dragank

    2 replies • 9038 views
  • Discussion

    is it possible to pass integer to verilog-a module?

    Category: Custom IC Design

    By delgsy

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    updated over 3 years ago by delgsy

    2 replies • 11030 views
  • Discussion

    Edge Triggered Current Source

    Category: Custom IC Design

    By Kevin Buck

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    updated over 3 years ago by Kevin Buck

    4 replies • 10376 views
  • Discussion

    How cadence generate the "IP Design.XML" file?

    Category: Custom IC Design

    By huhushuai

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    updated over 3 years ago by Andrew Beckett

    1 replies • 1819 views
  • Discussion

    speeding up .hb at a certain stage

    Category: Custom IC Design

    By FredWang

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    •

    updated over 3 years ago by FormerMember

    6 replies • 11363 views
  • Discussion

    Pin size on CMOS circuit layout design

    Category: Custom IC Design

    By Senan

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    •

    started over 3 years ago

    0 replies • 8960 views
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