Custom IC Design

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Discussion

Virtuoso XL 6.1.5.500.9 opens physConfig along with schematic

Category: Custom IC Design

By LongTimeNovice

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updated over 13 years ago by LongTimeNovice

4 replies • 17731 views
Discussion

spectreVerilog

Category: Custom IC Design

By uzzy

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updated over 13 years ago by Andrew Beckett

1 replies • 13356 views
Discussion

Using Inherited Parameters in PCells

Category: Custom IC Design

By msharma

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updated over 13 years ago by Andrew Beckett

4 replies • 15678 views
Discussion

How to determine the specific current.

Category: Custom IC Design

By Muffassir

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started over 13 years ago

0 replies • 13861 views
Discussion

Exporting/plotting data w/ constant time step in IC6.1.5

Category: Custom IC Design

By Rob Gregoire

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updated over 13 years ago by Rob Gregoire

6 replies • 2803 views
Discussion

dbCreateParamInst

Category: Custom IC Design

By ghost

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updated over 13 years ago by ghost

2 replies • 14279 views
Discussion

Different results for settling time

Category: Custom IC Design

By Medya

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started over 13 years ago

0 replies • 13314 views
Discussion

List of Message IDs from Xstream

Category: Custom IC Design

By Jameel

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updated over 13 years ago by Andrew Beckett

1 replies • 13038 views
Discussion

Virtuoso 6: visibility of layers in different edit-windows?

Category: Custom IC Design

By StefanSL

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updated over 13 years ago by StefanSL

2 replies • 14302 views
Discussion

How to measure and plot the current density in cadence ?

Category: Custom IC Design

By THRIVIK

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updated over 13 years ago by Quek

1 replies • 13987 views
Discussion

Using Matlab To Drive a Cadence DAC

Category: Custom IC Design

By buttonGuy

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started over 13 years ago

0 replies • 13103 views
Discussion

how to stop layout from turning into layout XL, 6.1.4

Category: Custom IC Design

By linbo

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updated over 13 years ago by linbo

2 replies • 13498 views
Discussion

Monte Carlo Statistical Analysis Not Displaying Complete Results

Category: Custom IC Design

By JustinTaylor86

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updated over 13 years ago by JustinTaylor86

2 replies • 13463 views
Discussion

Is there a way to make the text indicating Name Of instance or master fit in the P & R Boundary?

Category: Custom IC Design

By tatev

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updated over 13 years ago by tatev

2 replies • 635 views
Discussion

VCAR - Routing Specified Nets

Category: Custom IC Design

By sPoK

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updated over 13 years ago by sPoK

12 replies • 5510 views

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