Custom IC Design

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Discussion

ruler in virtuoso Layout L - problem solved

Category: Custom IC Design

By vikaspadu
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updated over 15 years ago by vikaspadu

2 replies • 7454 views
Discussion

ADE(GUI) DC analysis query

Category: Custom IC Design

By eppramod
•
updated over 15 years ago by eppramod

3 replies • 1154 views
Discussion

Encounter "short" violations

Category: Custom IC Design

By superman321
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updated over 15 years ago by Andrew Beckett

2 replies • 951 views
Discussion

How to get min value of a transistor width/length in a given pdk by skill?

Category: Custom IC Design

By IC Layout
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updated over 15 years ago by Andrew Beckett

1 replies • 2344 views
Discussion

Can OpenAccess stream in abd out gzip gds

Category: Custom IC Design

By Bidou
•
updated over 15 years ago by Andrew Beckett

1 replies • 13088 views
Discussion

Layout and LVS of a non-standard device!

Category: Custom IC Design

By Ueue
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updated over 16 years ago by Andrew Beckett

3 replies • 14862 views
Discussion

Cut Guard Ring - TTB

Category: Custom IC Design

By kashvi
•
started over 16 years ago

0 replies • 572 views
Discussion

Questions Regarding the Virtuoso XL Layout

Category: Custom IC Design

By tester
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updated over 16 years ago by Vabzter

3 replies • 13726 views
Discussion

MOS area and perimeter are not calculated from parametrized w and l

Category: Custom IC Design

By joliveros
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updated over 16 years ago by Andrew Beckett

3 replies • 14607 views
Discussion

Cannot view output log in ADE GXL during simulation

Category: Custom IC Design

By Grover
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updated over 16 years ago by Grover

6 replies • 16574 views
Discussion

behavioral VHDL description to Cadence Schematic

Category: Custom IC Design

By PrachiB
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updated over 16 years ago by Andrew Beckett

2 replies • 13973 views
Discussion

hexadecimal numbers in veriloga

Category: Custom IC Design

By Nikolaj
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updated over 16 years ago by Andrew Beckett

3 replies • 16370 views
Discussion

executable ncsim is not found in UNIX path

Category: Custom IC Design

By PrachiB
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updated over 16 years ago by PrachiB

2 replies • 16053 views
Discussion

IUS8.2: convert logic value to wreal

Category: Custom IC Design

By Chris Smit
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updated over 16 years ago by Chris Smit

1 replies • 14097 views
Discussion

Assert checks for overvoltage with duty-cycle

Category: Custom IC Design

By MarkSummers
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updated over 16 years ago by MarkSummers

7 replies • 17564 views

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