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Custom IC Design

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  • Discussion

    Spectre 16775 Warning

    Category: Custom IC Design

    By DeepaMohan

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    updated over 3 years ago by DeepaMohan

    4 replies • 10174 views
  • Discussion

    Is it possible to do this in VerilogA?

    Category: Custom IC Design

    By Svilen64

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    updated over 3 years ago by Svilen64

    11 replies • 13247 views
  • Discussion

    Issue in accessing PSF directory with ocean script.

    Category: Custom IC Design

    By dskang

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    updated over 3 years ago by FormerMember

    2 replies • 10542 views
  • Discussion

    Violations display in ADE L

    Category: Custom IC Design

    By FabioDiFazio

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    updated over 3 years ago by FabioDiFazio

    2 replies • 10591 views
  • Discussion

    bandwidth function in Virtuoso calculator

    Category: Custom IC Design

    By sidm

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    updated over 3 years ago by sidm

    2 replies • 17025 views
  • Discussion

    Using existing maestro view

    Category: Custom IC Design

    By sidm

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    updated over 3 years ago by sidm

    4 replies • 12119 views
  • Discussion

    OCEAN

    Category: Custom IC Design

    By IC clown

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    updated over 3 years ago by Andrew Beckett

    3 replies • 9928 views
  • Discussion

    some questions about pz analysis

    Category: Custom IC Design

    By zuiying

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    updated over 3 years ago by FormerMember

    1 replies • 13050 views
  • Discussion

    plotting Smith charts

    Category: Custom IC Design

    By dzakharian

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    updated over 3 years ago by Andrew Beckett

    15 replies • 26073 views
  • Discussion

    How does the correlation constraint "cc" affect the correlation of mismatch parameters

    Category: Custom IC Design

    By Matthew CG

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    updated over 3 years ago by Matthew CG

    2 replies • 2182 views
  • Discussion

    Models for components in sample lib

    Category: Custom IC Design

    By sidm

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    updated over 3 years ago by sidm

    6 replies • 11802 views
  • Discussion

    Change default increment of deriv

    Category: Custom IC Design

    By Holz

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    updated over 3 years ago by FormerMember

    5 replies • 10646 views
  • Discussion

    How can I import verilog-A (.va) file in the cadence virtuoso?

    Category: Custom IC Design

    By yysunj

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    updated over 3 years ago by Andrew Beckett

    1 replies • 10278 views
  • Discussion

    PLL reference model for PSS+PNOISE

    Category: Custom IC Design

    By HoWei

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    updated over 3 years ago by FormerMember

    5 replies • 4014 views
  • Discussion

    Maestro - use other output as spec value.

    Category: Custom IC Design

    By JeyJey

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    updated over 3 years ago by JeyJey

    6 replies • 4346 views
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