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Custom IC Design

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  • Discussion

    shortcut to bring ADE with current schematic to front

    Category: Custom IC Design

    By BaaB

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    updated over 6 years ago by Andrew Beckett

    20 replies • 19809 views
  • Discussion

    Parallelizing simulation with a variable sweep in an analysis itself

    Category: Custom IC Design

    By Emiel

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    updated over 6 years ago by Andrew Beckett

    1 replies • 14308 views
  • Discussion

    how to define different sweep variables for different test within the same adexl

    Category: Custom IC Design

    By Karev11

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    updated over 6 years ago by Andrew Beckett

    3 replies • 15479 views
  • Discussion

    Abstract physical information file (.LEF) of standard cell

    Category: Custom IC Design

    By fengye

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    updated over 6 years ago by fengye

    9 replies • 18626 views
  • Discussion

    CSF search mechanism - load .cdsinit from $HOME even if its disabled in setup.loc

    Category: Custom IC Design

    By HoWei

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    updated over 6 years ago by Andrew Beckett

    12 replies • 9422 views
  • Discussion

    the color of instance label in symbol editor

    Category: Custom IC Design

    By zssfred

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    updated over 6 years ago by zssfred

    3 replies • 15523 views
  • Discussion

    Layout versus Schematic design issue

    Category: Custom IC Design

    By NorNand

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    updated over 6 years ago by Andrew Beckett

    4 replies • 15669 views
  • Discussion

    Plotting VerilogA String Variables

    Category: Custom IC Design

    By Tjaart

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    updated over 6 years ago by Andrew Beckett

    4 replies • 16149 views
  • Discussion

    Monte Carlo simulation of noise contributions using SpectreMDL

    Category: Custom IC Design

    By svcher

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    updated over 6 years ago by svcher

    2 replies • 14308 views
  • Discussion

    Print spectre parameters

    Category: Custom IC Design

    By MatthewLove

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    updated over 6 years ago by MatthewLove

    2 replies • 15257 views
  • Discussion

    ERROR [SFE-874]:'Unexpected end of line' while running a .scs file generated using ADE L, cadence Virtuoso v6.1.4 with spectre

    Category: Custom IC Design

    By Chandu D

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    updated over 6 years ago by Chandu D

    18 replies • 22126 views
  • Discussion

    Operating Region of transistors

    Category: Custom IC Design

    By AtaV

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    •

    updated over 6 years ago by Andrew Beckett

    2 replies • 16366 views
  • Discussion

    RE: transient simulation accuracy

    Category: Custom IC Design

    By Kifah

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    •

    updated over 6 years ago by Kifah

    2 replies • 13985 views
  • Discussion

    ADE Assembler - Define IF statement with multiple results arguments (vector)

    Category: Custom IC Design

    By eljuanelo

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    updated over 6 years ago by Andrew Beckett

    3 replies • 1941 views
  • Discussion

    Matlab cadence integration setup

    Category: Custom IC Design

    By AtaV

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    •

    updated over 6 years ago by Andrew Beckett

    3 replies • 18597 views
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