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Custom IC Design

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  • Discussion

    How to access dummy voltage in ocean script?

    Category: Custom IC Design

    By Gangotree

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    updated over 9 years ago by Andrew Beckett

    1 replies • 13175 views
  • Discussion

    Confusion in various ways of printing the results in ADE L window

    Category: Custom IC Design

    By vinod joshi

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    started over 9 years ago

    0 replies • 12897 views
  • Discussion

    basic Common source amplifier

    Category: Custom IC Design

    By meth

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    updated over 9 years ago by meth

    2 replies • 16814 views
  • Discussion

    How to save value of global parameter in Spectre

    Category: Custom IC Design

    By svcher

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    updated over 9 years ago by svcher

    4 replies • 14759 views
  • Discussion

    Simulate fmax of a MOSFET

    Category: Custom IC Design

    By Pyroblast

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    updated over 9 years ago by Andrew Beckett

    3 replies • 19058 views
  • Discussion

    Latest Ruler in a layout window

    Category: Custom IC Design

    By JackPro

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    updated over 9 years ago by Andrew Beckett

    9 replies • 16569 views
  • Discussion

    Cadence ADE L Calculator and the expression used

    Category: Custom IC Design

    By Pyroblast

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    updated over 9 years ago by Andrew Beckett

    3 replies • 15564 views
  • Discussion

    Time Variable Resistor

    Category: Custom IC Design

    By Ahmed Taha

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    updated over 9 years ago by Andrew Beckett

    7 replies • 22430 views
  • Discussion

    Is there a way to measure the equivalent capacitance from a node to ground in a circuit?

    Category: Custom IC Design

    By BaaB

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    updated over 9 years ago by Andrew Beckett

    7 replies • 24435 views
  • Discussion

    Assura LVS using: setenv OA_UNSUPPORTED_PLAT linux_rhel40_gcc44x

    Category: Custom IC Design

    By bartman

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    updated over 9 years ago by Quek

    10 replies • 16565 views
  • Discussion

    Array manipulation in calculator

    Category: Custom IC Design

    By manudupouy

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    updated over 9 years ago by manudupouy

    3 replies • 16180 views
  • Discussion

    A divide by zero exception in connect_lib

    Category: Custom IC Design

    By twen

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    updated over 9 years ago by Andrew Beckett

    1 replies • 13947 views
  • Discussion

    DRD compactor versus stdcells

    Category: Custom IC Design

    By danmc91

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    started over 9 years ago

    0 replies • 13279 views
  • Discussion

    ELC : Simulation status : FAIL during db_spice

    Category: Custom IC Design

    By Hemal93

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    updated over 9 years ago by Hemal93

    6 replies • 14952 views
  • Discussion

    How to flatten layout cells and preserve pin names when pin names from different cells are the same

    Category: Custom IC Design

    By twen

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    updated over 9 years ago by Andrew Beckett

    10 replies • 20262 views
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