Custom IC Design

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HB analysis data calculating

Category: Custom IC Design

By Cdub

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updated over 6 years ago by Andrew Beckett

2 replies • 14637 views
Discussion

Pole zero analyses in Cadence ADE spectra

Category: Custom IC Design

By NorNand

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updated over 6 years ago by Andrew Beckett

4 replies • 23361 views
Discussion

rise_time and fall_time

Category: Custom IC Design

By jyoti kandpal

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updated over 6 years ago by Andrew Beckett

1 replies • 13805 views
Discussion

how to calculate THD ??

Category: Custom IC Design

By Muffassir

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updated over 6 years ago by Cdub

12 replies • 32278 views
Discussion

Monte Carlo Ocean XL: can not delete history in a loop

Category: Custom IC Design

By Martyniuk

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updated over 6 years ago by Martyniuk

3 replies • 16794 views
Discussion

How to add an accurate triggered clock in a testbench

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

3 replies • 16704 views
Discussion

spectre terminated prematurely due to fatal error.

Category: Custom IC Design

By hTmTech

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updated over 6 years ago by Andrew Beckett

7 replies • 27755 views
Discussion

Maestro: Use Simulation sweep variable in output equation

Category: Custom IC Design

By HoWei

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updated over 6 years ago by Andrew Beckett

8 replies • 21634 views
Discussion

PVS floating license

Category: Custom IC Design

By sjeur

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updated over 6 years ago by Andrew Beckett

6 replies • 17234 views
Discussion

Design migration tool

Category: Custom IC Design

By Faizan UL HAQ

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updated over 6 years ago by Andrew Beckett

21 replies • 41843 views
Discussion

Error during ADE spectre simulation

Category: Custom IC Design

By NorNand

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updated over 6 years ago by NorNand

12 replies • 23360 views
Discussion

DC OP calculation for voltage reference with Startup Circuit

Category: Custom IC Design

By Johanny Saenz

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updated over 6 years ago by FormerMember

3 replies • 17017 views
Discussion

Trouble using pPar with Spectre simulation

Category: Custom IC Design

By AlexandreBoyer

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updated over 6 years ago by Andrew Beckett

4 replies • 17858 views
Discussion

AMS simulation error after removing a verilogA cell from the testbench

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by RFStuff

3 replies • 14534 views
Discussion

Verilog $random seems to be not random

Category: Custom IC Design

By HoWei

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updated over 6 years ago by Andrew Beckett

2 replies • 18867 views

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