Custom IC Design

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Discussion

how to set netSet to connect power of sub-cell to top level cell to pass lvs

Category: Custom IC Design

By Nhumai

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started over 6 years ago

0 replies • 13983 views
Discussion

LVS issue: short between global net VSS! and gnd

Category: Custom IC Design

By isazulkc

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updated over 6 years ago by Nhumai

3 replies • 21756 views
Discussion

Annotations are just way too overpowering

Category: Custom IC Design

By CADcasualty

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updated over 6 years ago by CADcasualty

29 replies • 27203 views
Discussion

PSS Harmonic Balance Analysis, unexpected results

Category: Custom IC Design

By MohsenShah

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updated over 6 years ago by MohsenShah

4 replies • 15747 views
Discussion

ADE Explorer Variables to VerilogA Parameter Arrays

Category: Custom IC Design

By Tjaart

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updated over 6 years ago by Tjaart

2 replies • 16497 views
Discussion

VIVA calculator dnl&inl

Category: Custom IC Design

By Simons

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updated over 6 years ago by Andrew Beckett

3 replies • 3691 views
Discussion

Transient simulation crashes SPECTRE181, APS

Category: Custom IC Design

By Michael H

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updated over 6 years ago by Michael H

2 replies • 16546 views
Discussion

How to access data in info databases in PSF directory?

Category: Custom IC Design

By rawrakesh

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updated over 6 years ago by Andrew Beckett

1 replies • 15888 views
Discussion

Parameter sweep in layout and running extraction

Category: Custom IC Design

By Emiel

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updated over 6 years ago by Andrew Beckett

3 replies • 15828 views
Discussion

Error in running HSPICE NETLIST using cadence virtuoso ADE L

Category: Custom IC Design

By Chandu D

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updated over 6 years ago by Chandu D

2 replies • 18957 views
Discussion

functional mismatch of pre and post layout simulation results

Category: Custom IC Design

By abhi21

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updated over 6 years ago by Andrew Beckett

1 replies • 15566 views
Discussion

[Virtuoso] What is wrong with my RC transient simulation ?

Category: Custom IC Design

By Leey

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updated over 6 years ago by Leey

5 replies • 17679 views
Discussion

CalcVal

Category: Custom IC Design

By Pyroblast

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updated over 6 years ago by Andrew Beckett

1 replies • 14429 views
Discussion

spectre.out file in psf directory

Category: Custom IC Design

By nicola91it

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updated over 6 years ago by Andrew Beckett

3 replies • 18521 views
Discussion

Verilog-A Oscillator Phase noise

Category: Custom IC Design

By sherifali

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started over 6 years ago

0 replies • 14416 views

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