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Custom IC Design

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  • Discussion

    Library Generation

    Category: Custom IC Design

    By GreenGraphene GreenGraphene

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 12774 views
  • Discussion

    Virtuoso Ananlog Distributed Processing

    Category: Custom IC Design

    By Aldo2 Aldo2

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 13381 views
  • Discussion

    Spectre TRAN noise analysis ends with memory fault after warning: (SPECTRE-16780): LTE tolerance was temporarily relaxed to step over a discontinuity in the signal:

    Category: Custom IC Design

    By vivkr vivkr

    •

    updated over 12 years ago by Andrew Beckett

    4 replies • 17733 views
  • Discussion

    PDK Installed but doesn't show in CIW

    Category: Custom IC Design

    By wgtkan wgtkan

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 2365 views
  • Discussion

    How to measure gm accurately

    Category: Custom IC Design

    By wgtkan wgtkan

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 18260 views
  • Discussion

    How to plot an histogram using ocean script? (monte carlo problem)

    Category: Custom IC Design

    By Ricardo Alves Ricardo Alves

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 13972 views
  • Discussion

    ADE-L progress bar during ac, noise or stb analyses disturbs cadence environment. How to switch it off?

    Category: Custom IC Design

    By dalistoj dalistoj

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 12979 views
  • Discussion

    How to simulate starRC generated .SPF files through ADE

    Category: Custom IC Design

    By reddy1553 reddy1553

    •

    updated over 12 years ago by Andrew Beckett

    3 replies • 18309 views
  • Discussion

    ADE XL multiple tests with different corners

    Category: Custom IC Design

    By Tobben24 Tobben24

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 15486 views
  • Discussion

    Using ocean ADEXL generate a csv output file

    Category: Custom IC Design

    By rkic rkic

    •

    updated over 12 years ago by Andrew Beckett

    7 replies • 18407 views
  • Discussion

    How to associate an extracted netlist of a subckt to the symbol view in schematic editor.

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 12 years ago by RFStuff

    8 replies • 19997 views
  • Discussion

    Huge psf file!! Cannot allocate memory

    Category: Custom IC Design

    By SPA1984 SPA1984

    •

    updated over 12 years ago by Andrew Beckett

    3 replies • 15730 views
  • Discussion

    How to load my configeration files from my working directory not home directory

    Category: Custom IC Design

    By wgtkan wgtkan

    •

    updated over 12 years ago by wgtkan

    4 replies • 17963 views
  • Discussion

    Doubt regarding layout gpdk 45nm

    Category: Custom IC Design

    By madhusudha madhusudha

    •

    updated over 12 years ago by theopaone

    2 replies • 18229 views
  • Discussion

    Cadence waveform viewer display error

    Category: Custom IC Design

    By likelike likelike

    •

    updated over 12 years ago by likelike

    2 replies • 15363 views
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