Custom IC Design

Latest Posts

Discussion

How to convert a technology file to a layer mapping file

Category: Custom IC Design

By SUEE
•
updated over 12 years ago by SUEE

5 replies • 20508 views
Discussion

strange error message in running adexl

Category: Custom IC Design

By Joe Black
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updated over 12 years ago by Andrew Beckett

8 replies • 18854 views
Discussion

vdbToRcx error

Category: Custom IC Design

By wighou
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updated over 12 years ago by Andrew Beckett

3 replies • 13549 views
Discussion

Parameter Measurements

Category: Custom IC Design

By madhusudha
•
updated over 12 years ago by Andrew Beckett

1 replies • 13571 views
Discussion

functional error

Category: Custom IC Design

By gsciller
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updated over 12 years ago by Andrew Beckett

1 replies • 13011 views
Discussion

Licensing problem for QRC extraction

Category: Custom IC Design

By wighou
•
updated over 12 years ago by Andrew Beckett

2 replies • 13791 views
Discussion

Assigning a Net Name to a Layer for LVS/RCX

Category: Custom IC Design

By LanceT
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updated over 12 years ago by Andrew Beckett

7 replies • 3061 views
Discussion

Layout cell checked out warnings because of rulers.

Category: Custom IC Design

By fun4skilled
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updated over 12 years ago by Andrew Beckett

4 replies • 13654 views
Discussion

How to get the windowId?

Category: Custom IC Design

By Siddique baig
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updated over 12 years ago by Siddique baig

2 replies • 17669 views
Discussion

AMS Simulator support for SystemVerilog Math Functions

Category: Custom IC Design

By gintel
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updated over 12 years ago by gintel

2 replies • 15258 views
Discussion

Loosening tolerance on a subcircuit basis

Category: Custom IC Design

By swdesigner
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updated over 12 years ago by Andrew Beckett

1 replies • 12886 views
Discussion

Referencing symbols with buses during SpiceIn

Category: Custom IC Design

By brianzimmer
•
started over 12 years ago

0 replies • 12961 views
Discussion

Information on dc_pivot_check option

Category: Custom IC Design

By Dmitry Babin
•
updated over 12 years ago by Dmitry Babin

4 replies • 23364 views
Discussion

How do I get ADEXL to update and fill in missing MonteCarlo trials that failed to converge?

Category: Custom IC Design

By billnxp
•
started over 12 years ago

0 replies • 12876 views
Discussion

Pin mismatch between schematic and symbol in Virtuoso

Category: Custom IC Design

By asta51
•
updated over 12 years ago by Andrew Beckett

1 replies • 15428 views

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