Custom IC Design

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Discussion

Guidelines for the Custom IC Design Forum

Category: Custom IC Design

By Andrew Beckett

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started over 14 years ago

0 replies • 29143 views
Discussion

Noise Results from Transient Noise Simulation and Noise Simulation

Category: Custom IC Design

By Kenny Lu

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started 1 hour ago

0 replies • 29 views
Discussion

Cannot generate the EMIR report using 'emirreport'

Category: Custom IC Design

By aalbason

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updated 1 hour ago by Saloni Chhabra

3 replies • 459 views
Discussion

EMIR Pin Current Results Discrepancy vs Transient Simulation Results

Category: Custom IC Design

By aalbason

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started 10 hours ago

0 replies • 40 views
Discussion

Re: netlisting of verilogA block with choices for prompt in CDF

Category: Custom IC Design

By SL202411208815

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started 13 hours ago

0 replies • 31 views
Discussion

ic25.1 lib manager doesn't show last modification date

Category: Custom IC Design

By sjwprcssw

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started 1 day ago

0 replies • 305 views
Discussion

Cadence virtuso aging simulation

Category: Custom IC Design

By PB202509293935

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updated 2 days ago by PB202509293935

4 replies • 1114 views
Discussion

How to rerun just one test of a simulation with 2 test and variable dependency

Category: Custom IC Design

By Pedrocasty

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updated 2 days ago by Yagya Mishra

3 replies • 1275 views
Discussion

Creating GaN Device Symbol (EPC2001C) from Spectre Model File in Virtuoso

Category: Custom IC Design

By AT202509281158

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updated 2 days ago by Yagya Mishra

1 replies • 647 views
Discussion

using output from one point sweep to another

Category: Custom IC Design

By RA202502215244

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updated 2 days ago by Yagya Mishra

1 replies • 1052 views
Discussion

Virtuoso PEX "Nothing in Layout" Issue

Category: Custom IC Design

By AR202509099018

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updated 2 days ago by Andrew Beckett

3 replies • 833 views
Discussion

Issue with Deselecting Labels Having "Text Drawing" Layers in Layout

Category: Custom IC Design

By AR202509246930

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updated 3 days ago by AR202509246930

4 replies • 1024 views
Discussion

can we ask virtuoso to write its lock or CDS.log somewhere else than $HOME ?

Category: Custom IC Design

By ebecheto

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updated 5 days ago by Andrew Beckett

4 replies • 1166 views
Discussion

Weird simulation results in latest Spectre Transient Noise Simulation RAK

Category: Custom IC Design

By OPump

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started 6 days ago

0 replies • 474 views
Discussion

calculator expression to compare wreal value with voltage value

Category: Custom IC Design

By Monica123

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updated 6 days ago by Monica123

2 replies • 1176 views

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