Custom IC Design

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DRC Cadence

Category: Custom IC Design

By Zahir Kaka
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updated over 3 years ago by Andrew Beckett

1 replies • 8939 views
Discussion

ERROR (ASSEMBLER-5011) and high memory usage after some long simulations

Category: Custom IC Design

By delgsy
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updated over 3 years ago by Andrew Beckett

1 replies • 9248 views
Discussion

Coplanar wavewguide with GND plane

Category: Custom IC Design

By BoniUNIPR
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updated over 3 years ago by BoniUNIPR

2 replies • 9364 views
Discussion

verilogA

Category: Custom IC Design

By abdurrahman0234
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updated over 3 years ago by Andrew Beckett

1 replies • 9117 views
Discussion

InstallScape - failed to install component: cdsPython

Category: Custom IC Design

By bernardoleite
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updated over 3 years ago by bernardoleite

5 replies • 3279 views
Discussion

Cannot select signals to be saved in ADE Explorer/Assembler; net listing is incorrect etc.

Category: Custom IC Design

By SteveVrk
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updated over 3 years ago by FormerMember

9 replies • 5630 views
Discussion

VerilogA module instance parameter override weird behavior

Category: Custom IC Design

By AAbdelRahman
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updated over 3 years ago by AAbdelRahman

7 replies • 13022 views
Discussion

Thermal noise modeling

Category: Custom IC Design

By mahdiee86
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updated over 3 years ago by Andrew Beckett

5 replies • 12351 views
Discussion

Assembler-4040 Failed to fetch results from Matlab script

Category: Custom IC Design

By Brad RFeng
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updated over 3 years ago by Andrew Beckett

1 replies • 8951 views
Discussion

Maestro file become very large

Category: Custom IC Design

By delgsy
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updated over 3 years ago by delgsy

2 replies • 9619 views
Discussion

Multipart Path Dependent Separation and Multiple Master Paths

Category: Custom IC Design

By Kevin Buck
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updated over 3 years ago by Kevin Buck

4 replies • 10294 views
Discussion

5 Terminal MOSFET to exploit the Bipolar Operation of MOSFET

Category: Custom IC Design

By Zahid1234
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updated over 3 years ago by Andrew Beckett

1 replies • 9830 views
Discussion

Verilog-A Parser shows an error but simulation runs successfully with 0 errors

Category: Custom IC Design

By ElZorro
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updated over 3 years ago by ElZorro

2 replies • 11871 views
Discussion

Conditional netlisting of instance depending on CDF parameter value

Category: Custom IC Design

By JackCadnece
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updated over 3 years ago by JackCadnece

2 replies • 9667 views
Discussion

Liberate - Constraint search failed

Category: Custom IC Design

By iamKarthikBK
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updated over 3 years ago by iamKarthikBK

4 replies • 2271 views

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