Custom IC Design

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Discussion

Library charecterization without post-layout netlists

Category: Custom IC Design

By iamKarthikBK
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updated over 4 years ago by iamKarthikBK

15 replies • 14238 views
Discussion

VIVA Evaluation error for calculator expression over corners in ADE Assembler

Category: Custom IC Design

By Senan
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updated over 4 years ago by Senan

2 replies • 12445 views
Discussion

Update VerilogA outputs during simulation based on values read from from

Category: Custom IC Design

By slim15
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updated over 4 years ago by Andrew Beckett

1 replies • 9909 views
Discussion

Noise Figure of track and hold circuit

Category: Custom IC Design

By Alok110
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updated over 4 years ago by FormerMember

17 replies • 21922 views
Discussion

Server processor selection - any difference in performance and features (AMD Epyc - Intel Xeon)

Category: Custom IC Design

By HoWei
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started over 4 years ago

0 replies • 995 views
Discussion

How to add variable in model files?

Category: Custom IC Design

By Firdos
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updated over 4 years ago by Firdos

8 replies • 15282 views
Discussion

annotate text to a schematic from a file every time the schematic is opened or refreshed

Category: Custom IC Design

By DerekH
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updated over 4 years ago by DerekH

2 replies • 10774 views
Discussion

Changing the parameter inside model file for creating multiple corner cases.

Category: Custom IC Design

By sidm
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updated over 4 years ago by Andrew Beckett

9 replies • 17545 views
Discussion

Using SystemC models in ADE

Category: Custom IC Design

By ChrisEAS
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updated over 4 years ago by ChrisEAS

4 replies • 10220 views
Discussion

How to simulate a mixed-signal system if power-supply is time-varient

Category: Custom IC Design

By SpiceMonkey
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started over 4 years ago

0 replies • 9434 views
Discussion

Square pins on symbols in verilogin

Category: Custom IC Design

By CSCNalu
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updated over 4 years ago by CSCNalu

2 replies • 9796 views
Discussion

Making a monte carlo simulation component specific

Category: Custom IC Design

By simbamford
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updated over 4 years ago by HenrikAtOticon

18 replies • 25025 views
Discussion

Can we change the options for turning on/off the noise contributors in the simulation script?

Category: Custom IC Design

By greywanderer
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updated over 4 years ago by greywanderer

2 replies • 1185 views
Discussion

$finish_current_analysis in verilogA

Category: Custom IC Design

By Svilen64
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updated over 4 years ago by Andrew Beckett

1 replies • 10071 views
Discussion

Use Maestro expressions in Ocean script

Category: Custom IC Design

By FormerMember
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updated over 4 years ago by FormerMember

2 replies • 5164 views

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