Custom IC Design

Latest Posts

Discussion

LVS issue: short between global net VSS! and gnd

Category: Custom IC Design

By isazulkc

$usertype
•
updated over 6 years ago by Nhumai

3 replies • 21597 views
Discussion

Annotations are just way too overpowering

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 6 years ago by CADcasualty

29 replies • 26892 views
Discussion

PSS Harmonic Balance Analysis, unexpected results

Category: Custom IC Design

By MohsenShah

$usertype
•
updated over 6 years ago by MohsenShah

4 replies • 15624 views
Discussion

ADE Explorer Variables to VerilogA Parameter Arrays

Category: Custom IC Design

By Tjaart

$usertype
•
updated over 6 years ago by Tjaart

2 replies • 16387 views
Discussion

VIVA calculator dnl&inl

Category: Custom IC Design

By Simons

$usertype
•
updated over 6 years ago by Andrew Beckett

3 replies • 3659 views
Discussion

Transient simulation crashes SPECTRE181, APS

Category: Custom IC Design

By Michael H

$usertype
•
updated over 6 years ago by Michael H

2 replies • 16430 views
Discussion

How to access data in info databases in PSF directory?

Category: Custom IC Design

By rawrakesh

$usertype
•
updated over 6 years ago by Andrew Beckett

1 replies • 15775 views
Discussion

Parameter sweep in layout and running extraction

Category: Custom IC Design

By Emiel

$usertype
•
updated over 6 years ago by Andrew Beckett

3 replies • 15710 views
Discussion

Error in running HSPICE NETLIST using cadence virtuoso ADE L

Category: Custom IC Design

By Chandu D

$usertype
•
updated over 6 years ago by Chandu D

2 replies • 18822 views
Discussion

functional mismatch of pre and post layout simulation results

Category: Custom IC Design

By abhi21

$usertype
•
updated over 6 years ago by Andrew Beckett

1 replies • 15460 views
Discussion

[Virtuoso] What is wrong with my RC transient simulation ?

Category: Custom IC Design

By Leey

$usertype
•
updated over 6 years ago by Leey

5 replies • 17545 views
Discussion

CalcVal

Category: Custom IC Design

By Pyroblast

$usertype
•
updated over 6 years ago by Andrew Beckett

1 replies • 14336 views
Discussion

spectre.out file in psf directory

Category: Custom IC Design

By nicola91it

$usertype
•
updated over 6 years ago by Andrew Beckett

3 replies • 18389 views
Discussion

Verilog-A Oscillator Phase noise

Category: Custom IC Design

By sherifali

$usertype
•
started over 6 years ago

0 replies • 14326 views
Discussion

Issue with multiple QRC runs

Category: Custom IC Design

By Suryansh Singh

$usertype
•
updated over 6 years ago by Suryansh Singh

2 replies • 14140 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.