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Custom IC Design

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  • Discussion

    Trouble with ocean script for parametric analysis using ADE L

    Category: Custom IC Design

    By saikatc

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    updated over 9 years ago by saikatc

    11 replies • 18617 views
  • Discussion

    Script Skill: copy layers in the layout view

    Category: Custom IC Design

    By tahm

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    updated over 9 years ago by Andrew Beckett

    3 replies • 16547 views
  • Discussion

    How could I make my PV GUI communicate with Virtuoso through port so gds export has no issue

    Category: Custom IC Design

    By mctang

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    updated over 9 years ago by mctang

    4 replies • 15477 views
  • Discussion

    Aging simulation fails in mode URI_mode: appendage

    Category: Custom IC Design

    By Amel

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    updated over 9 years ago by Andrew Beckett

    1 replies • 14264 views
  • Discussion

    Cadence library and cell views

    Category: Custom IC Design

    By Pyroblast

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    updated over 9 years ago by Andrew Beckett

    3 replies • 18886 views
  • Discussion

    How can I edit the purpose of Pcell'Layers

    Category: Custom IC Design

    By tahm

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    •

    updated over 9 years ago by Andrew Beckett

    3 replies • 1736 views
  • Discussion

    In WSP, how to align different layout instances tracks in top level

    Category: Custom IC Design

    By Ganesh 213

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    updated over 9 years ago by Ganesh 213

    2 replies • 15651 views
  • Discussion

    QuickAlign "center" to "edge-center" deprecated in Layout 6.1.7?

    Category: Custom IC Design

    By dontpanic

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    updated over 9 years ago by Andrew Beckett

    8 replies • 10684 views
  • Discussion

    ADE-XL: How to (efficiently) sweep parameters over a "Statistical Corner"

    Category: Custom IC Design

    By dontpanic

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    updated over 9 years ago by dontpanic

    2 replies • 2543 views
  • Discussion

    IC6 constraining/placing matched transistors

    Category: Custom IC Design

    By stuso

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    updated over 9 years ago by Andrew Beckett

    12 replies • 7445 views
  • Discussion

    Inconsistency between time and freq. domain results in pss plot

    Category: Custom IC Design

    By VLSIiitm

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    updated over 9 years ago by VLSIiitm

    1 replies • 14974 views
  • Discussion

    ADE-XL "Saving History" very slow

    Category: Custom IC Design

    By Rob Gregoire

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    updated over 9 years ago by Rob Gregoire

    10 replies • 4515 views
  • Discussion

    Using Edit-Component Display for annotating dc operating point

    Category: Custom IC Design

    By jdp721

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    updated over 9 years ago by Andrew Beckett

    1 replies • 14669 views
  • Discussion

    How to trigger call-back procedure when changing cell-name of existing instance?

    Category: Custom IC Design

    By Sheppy

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    updated over 9 years ago by Andrew Beckett

    4 replies • 17765 views
  • Discussion

    export def without component orientation

    Category: Custom IC Design

    By Polly

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    started over 9 years ago

    0 replies • 13598 views
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