Custom IC Design

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Discussion

ADE maestro results table: How can I filter out empty cells?

Category: Custom IC Design

By StephanWeber
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updated over 3 years ago by StephanWeber

2 replies • 8611 views
Discussion

Power and delay of digital circuits using cadence

Category: Custom IC Design

By Aswathyn
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updated over 3 years ago by Aswathyn

5 replies • 10673 views
Discussion

passing global variable to ADE output

Category: Custom IC Design

By TommasoF
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updated over 3 years ago by TommasoF

12 replies • 13940 views
Discussion

Assembler: Can't use VAR() in output expression when EvalType is sweeps, all i.e. not point

Category: Custom IC Design

By ayayla
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updated over 3 years ago by ayayla

2 replies • 1634 views
Discussion

Display two area of a tran sim simultaneously?

Category: Custom IC Design

By kenc184
•
updated over 3 years ago by kenc184

4 replies • 8038 views
Discussion

Can I hide the gray rows in output results table?

Category: Custom IC Design

By StephanWeber
•
updated over 3 years ago by Andrew Beckett

3 replies • 8786 views
Discussion

How to plot temperature vs time in Viva?

Category: Custom IC Design

By StephanWeber
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updated over 3 years ago by StephanWeber

4 replies • 9525 views
Discussion

Cadence Viva - customizing traceLegend font size

Category: Custom IC Design

By firebolt
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updated over 3 years ago by firebolt

2 replies • 3302 views
Discussion

Last Time Value of a Tran-Simulation as Final Value in integ-Function in VIVA-Calculator

Category: Custom IC Design

By iq79
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updated over 3 years ago by iq79

6 replies • 9185 views
Discussion

Importing psf file from a old mastero run to an existing mastero for the same testbench schematic

Category: Custom IC Design

By hdeshmukhnvidia
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updated over 3 years ago by Andrew Beckett

5 replies • 8458 views
Discussion

how to input hex to a 32bit bus pin

Category: Custom IC Design

By Karev11
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updated over 3 years ago by Andrew Beckett

1 replies • 8002 views
Discussion

setting temperature by veriloga via cds_set_temperature and make it work for stb analysis

Category: Custom IC Design

By StephanWeber
•
updated over 3 years ago by drdanmc

4 replies • 10772 views
Discussion

Transmission Line Simulation in EMX

Category: Custom IC Design

By Sumit Dash
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updated over 3 years ago by drdanmc

1 replies • 10819 views
Discussion

pss pac: sideband transfer function accuracy vs. maxacfrequency

Category: Custom IC Design

By ashwinrs
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updated over 3 years ago by Andrew Beckett

1 replies • 8463 views
Discussion

Spectre segmentation fault

Category: Custom IC Design

By Pavel2022
•
updated over 3 years ago by Andrew Beckett

1 replies • 14679 views

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