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Community Custom IC Design

Custom IC Design

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  • Discussion

    Guidelines for the Custom IC Design Forum

    Category: Custom IC Design

    By Andrew Beckett Andrew Beckett

    •

    started over 13 years ago

    0 replies • 26265 views
  • Discussion

    The spec of adexl

    Category: Custom IC Design

    By dogman4 dogman4

    •

    updated 13 hours ago by dogman4

    3 replies • 115 views
  • Discussion

    Issue with Level=3 MOS model in Spectre

    Category: Custom IC Design

    By milind123 milind123

    •

    updated 14 hours ago by milind123

    8 replies • 240 views
  • Discussion

    Spectre error: parameter range violation

    Category: Custom IC Design

    By TM202409102328 TM202409102328

    •

    updated 2 days ago by Andrew Beckett

    1 replies • 112 views
  • Discussion

    run plan - pass a filepath though the calcVal() function

    Category: Custom IC Design

    By cnicola cnicola

    •

    updated 2 days ago by cnicola

    1 replies • 76 views
  • Discussion

    creating output expression while doing parametric sweep

    Category: Custom IC Design

    By Svilen64 Svilen64

    •

    updated 3 days ago by Volker T

    1 replies • 139 views
  • Discussion

    Setting supply sensitivity by default for any new pin in Virtuoso Schematic

    Category: Custom IC Design

    By MN202411268924 MN202411268924

    •

    started 3 days ago

    0 replies • 90 views
  • Discussion

    Set Use No DM option to default when create library in library manager

    Category: Custom IC Design

    By JH202504237643 JH202504237643

    •

    started 3 days ago

    0 replies • 81 views
  • Discussion

    metal pin in layout is showing its actual color

    Category: Custom IC Design

    By rtyuy rtyuy

    •

    updated 4 days ago by rtyuy

    6 replies • 464 views
  • Discussion

    Aging Simulation Failure.(success in HCI mode, failure in PBTI mode and NBTI mode)

    Category: Custom IC Design

    By LS202412014215 LS202412014215

    •

    started 4 days ago

    0 replies • 103 views
  • Discussion

    import verilog

    Category: Custom IC Design

    By MS202504187741 MS202504187741

    •

    updated 7 days ago by MS202504187741

    1 replies • 347 views
  • Discussion

    ERROR (SFE-874). Not able to resolve this issue

    Category: Custom IC Design

    By akaraguppi akaraguppi

    •

    updated 7 days ago by akaraguppi

    2 replies • 297 views
  • Discussion

    Importing Synopsys .slib symbols to Cadence Virtuoso

    Category: Custom IC Design

    By rajasnene16 rajasnene16

    •

    updated 7 days ago by rajasnene16

    2 replies • 231 views
  • Discussion

    Impedance matching between ports

    Category: Custom IC Design

    By Tiago Silva Tiago Silva

    •

    started 8 days ago

    0 replies • 160 views
  • Discussion

    When I was liberating a DFF cell that has three outputs {Q QN Q1},I get the trouble

    Category: Custom IC Design

    By TH20240830782 TH20240830782

    •

    started 9 days ago

    0 replies • 85 views
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