Custom IC Design

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Discussion

Getting the wellpin in lef using abstract

Category: Custom IC Design

By djknight
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updated over 4 years ago by Andrew Beckett

1 replies • 10356 views
Discussion

preparation for verifying large blocks

Category: Custom IC Design

By ichiro
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updated over 4 years ago by FormerMember

8 replies • 12602 views
Discussion

passing variable number of params in spectre subckt call?

Category: Custom IC Design

By smikes
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updated over 4 years ago by Andrew Beckett

1 replies • 11176 views
Discussion

Cadence Abstract DLNOLK : Failed to get exclusive lock

Category: Custom IC Design

By anurans
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updated over 4 years ago by Andrew Beckett

1 replies • 11364 views
Discussion

ADE Assembler: variable values with leading zeros interpreted as octal in ICADVM20.1

Category: Custom IC Design

By dontpanic
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updated over 4 years ago by Andrew Beckett

6 replies • 12327 views
Discussion

What's the bindkey command for ascend to top level on Cadence?

Category: Custom IC Design

By venkmanbuster
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updated over 4 years ago by Andrew Beckett

6 replies • 6353 views
Discussion

create a copy of device library, some parameters' limitCheck failed....

Category: Custom IC Design

By ringamp
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updated over 4 years ago by Andrew Beckett

3 replies • 1163 views
Discussion

Getting Flat Outputs while implementing a 6 Bit Flash ADC using VerilogA.

Category: Custom IC Design

By Kulmani
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updated over 4 years ago by Andrew Beckett

10 replies • 14535 views
Discussion

Need a solution to build pre-computed look-up table manually

Category: Custom IC Design

By circuit apprentice
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updated over 4 years ago by circuit apprentice

2 replies • 10934 views
Discussion

check and save schematic, there's a warning I don't know where it comes

Category: Custom IC Design

By ringamp
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updated over 4 years ago by ringamp

3 replies • 6286 views
Discussion

Schematic Grid Dot Size

Category: Custom IC Design

By JeCh
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updated over 4 years ago by JeCh

2 replies • 12839 views
Discussion

Repeating vector files

Category: Custom IC Design

By Hazem Al Indari
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updated over 4 years ago by Andrew Beckett

1 replies • 11149 views
Discussion

Is it possible to also save phase information for the gain transfer function in noise analysis?

Category: Custom IC Design

By NourSeif
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updated over 4 years ago by NourSeif

2 replies • 10587 views
Discussion

calcVal failure: Job log says some outputs used by Calcval have failed, but they haven't.

Category: Custom IC Design

By Ernesto1
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updated over 4 years ago by Ernesto1

4 replies • 2446 views
Discussion

Unable to plot from ADE Assembler results tab

Category: Custom IC Design

By unSkilled
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updated over 4 years ago by Andrew Beckett

3 replies • 12847 views

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