Custom IC Design

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technology file manager

Category: Custom IC Design

By skillEater

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updated over 5 years ago by Andrew Beckett

3 replies • 14984 views
Discussion

Parameters of a FINFET

Category: Custom IC Design

By ElectronLearn

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updated over 5 years ago by Andrew Beckett

3 replies • 16978 views
Discussion

extract min and max over corners for every variable step

Category: Custom IC Design

By skylink

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updated over 5 years ago by skylink

2 replies • 16217 views
Discussion

How to reduce parasitics from layout

Category: Custom IC Design

By jyoti kandpal

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updated over 5 years ago by FormerMember

1 replies • 15499 views
Discussion

Virtuosity: Looking Back at Virtuoso ADE Product Suite and Virtuoso Visualization and Analysis in 2019

Category: Custom IC Design

By Andrew Beckett

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started over 5 years ago

0 replies • 12755 views
Discussion

layout extraction avoid a specific area

Category: Custom IC Design

By S Liu

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updated over 5 years ago by Andrew Beckett

1 replies • 13142 views
Discussion

Programmatically set y-axis in VIVA in Log Scale

Category: Custom IC Design

By Paolo Minotti

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updated over 5 years ago by Andrew Beckett

6 replies • 18732 views
Discussion

How to flatten a hierarchical design?

Category: Custom IC Design

By Fari

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updated over 5 years ago by Andrew Beckett

1 replies • 15190 views
Discussion

trouble enabling MPT coloring in IC18

Category: Custom IC Design

By Stevemc12

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updated over 5 years ago by Stevemc12

4 replies • 15111 views
Discussion

how to create own via in cadence software

Category: Custom IC Design

By jyoti kandpal

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updated over 5 years ago by Andrew Beckett

3 replies • 13440 views
Discussion

newbie to skill scripting

Category: Custom IC Design

By cadvin

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updated over 5 years ago by Andrew Beckett

9 replies • 15815 views
Discussion

dspf_include accept spectre syntax?

Category: Custom IC Design

By yeh1

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updated over 5 years ago by yeh1

4 replies • 14062 views
Discussion

CDF parameter of View - Default Options

Category: Custom IC Design

By ChrisG04

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updated over 5 years ago by ChrisG04

2 replies • 11086 views
Discussion

ICADVM18.1 - using Layout L instead of XL

Category: Custom IC Design

By memphis

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updated over 5 years ago by memphis

2 replies • 1075 views
Discussion

Virtuoso - How to Setup up rules check to give error during netlist out in case of missing CDF param

Category: Custom IC Design

By roopakvasa

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updated over 5 years ago by Andrew Beckett

3 replies • 2127 views

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