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Custom IC Design

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  • Discussion

    Virtuoso ADE dc analysis incorrectly turned to multiple design point mode

    Category: Custom IC Design

    By SimbaG

    •

    updated over 1 year ago by SimbaG

    4 replies • 4818 views
  • Discussion

    evaluation of "all" possible outputs

    Category: Custom IC Design

    By leok

    •

    updated over 1 year ago by leok

    3 replies • 1164 views
  • Discussion

    Problem with DC convergence in Bias Circuit

    Category: Custom IC Design

    By SC202503236954

    •

    updated over 1 year ago by sgcad

    2 replies • 4274 views
  • Discussion

    Need help in current Compliance for a circuit

    Category: Custom IC Design

    By SM202501097919

    •

    started over 1 year ago

    0 replies • 2778 views
  • Discussion

    Spectre PXF: using Jitter parameters in analysis options

    Category: Custom IC Design

    By mmVivek

    •

    started over 1 year ago

    0 replies • 2853 views
  • Discussion

    Bit streaming in Vector - in defined period

    Category: Custom IC Design

    By SC202503233131

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 636 views
  • Discussion

    Problem with a waveform

    Category: Custom IC Design

    By tomgerga

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3385 views
  • Discussion

    ADE XL simulation efficiency and errors

    Category: Custom IC Design

    By dogman4

    •

    updated over 1 year ago by Andrew Beckett

    5 replies • 5142 views
  • Discussion

    ERROR (LMF-02096)

    Category: Custom IC Design

    By CB202409064221

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3964 views
  • Discussion

    conditional variable based type of test

    Category: Custom IC Design

    By sjwprcssw

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 2983 views
  • Discussion

    PSF_utils not working on binary psf folder

    Category: Custom IC Design

    By Shlok Vaibhav

    •

    updated over 1 year ago by Andrew Beckett

    3 replies • 5040 views
  • Discussion

    Erroneous report in EMIR tool shows failed nets as passed.

    Category: Custom IC Design

    By unSkilled

    •

    started over 1 year ago

    0 replies • 2863 views
  • Discussion

    Verilog-A module for calculation of average 100 MHz continuous input signal (unaccurate results when analyzing in WaveView; transient sim in spectre)

    Category: Custom IC Design

    By FC202502053712

    •

    started over 1 year ago

    0 replies • 3006 views
  • Discussion

    trouble opening new cellview

    Category: Custom IC Design

    By SH202501029855

    •

    updated over 1 year ago by SH202501029855

    2 replies • 3574 views
  • Discussion

    Nonlinear (voltage dependent) resistor model

    Category: Custom IC Design

    By MikeA

    •

    updated over 1 year ago by MikeA

    3 replies • 3779 views
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