Custom IC Design

Latest Posts

Discussion

How to increase the number resolution shown by OCEAN

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 12 years ago by RFStuff

2 replies • 14681 views
Discussion

how to use different models for different blocks in a config view simulation

Category: Custom IC Design

By rickyuexu

$usertype
•
updated over 12 years ago by rickyuexu

2 replies • 14426 views
Discussion

Virtuoso layout (Connectivity-> Mark Net highlights some faraway wires)

Category: Custom IC Design

By vivkr

$usertype
•
updated over 12 years ago by vivkr

2 replies • 3121 views
Discussion

ADE XL Monte Carlo Simulation: "Error evaluating ocean expression"

Category: Custom IC Design

By lperktold

$usertype
•
updated over 12 years ago by MartinKP

15 replies • 9018 views
Discussion

problem in getting power information from the given below verilog-AMS code

Category: Custom IC Design

By sunilreddy

$usertype
•
started over 12 years ago

0 replies • 12982 views
Discussion

ADE(Analog Design Environment) display problems

Category: Custom IC Design

By myungha

$usertype
•
updated over 12 years ago by myungha

6 replies • 2004 views
Discussion

save option not working for ac within transient

Category: Custom IC Design

By Steve Mikes

$usertype
•
updated over 12 years ago by Andrew Beckett

5 replies • 14860 views
Discussion

ADEXL: backannotation of transient operating points for montecarlo points

Category: Custom IC Design

By spectrallypure

$usertype
•
updated over 12 years ago by spectrallypure

3 replies • 14931 views
Discussion

Why the l(m) and w(m) are always set 5e-06m in model parameter field after any simulation?

Category: Custom IC Design

By Alex Liao

$usertype
•
updated over 12 years ago by Alex Liao

2 replies • 753 views
Discussion

Transien response of inverter

Category: Custom IC Design

By sreeni

$usertype
•
updated over 12 years ago by sreeni

2 replies • 13594 views
Discussion

Cadence IC 5.1 Libmanager problem

Category: Custom IC Design

By Darshak

$usertype
•
updated over 12 years ago by Darshak

2 replies • 13967 views
Discussion

Switch Extracted view names in ADEXL

Category: Custom IC Design

By ank0888

$usertype
•
updated over 12 years ago by ank0888

3 replies • 16712 views
Discussion

Error while plotting Extracted simulation results

Category: Custom IC Design

By aravindvj

$usertype
•
updated over 12 years ago by Andrew Beckett

7 replies • 21118 views
Discussion

ADEXL Montecarlo, only netlisting

Category: Custom IC Design

By demsar

$usertype
•
updated over 12 years ago by Andrew Beckett

6 replies • 16505 views
Discussion

Error in Simulating Verilog XL+Analog in spectreVerilog

Category: Custom IC Design

By ksnf3000

$usertype
•
updated over 12 years ago by Andrew Beckett

2 replies • 2197 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.