Custom IC Design

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Wavescan trace display issue

Category: Custom IC Design

By sohaiba
•
updated over 13 years ago by sohaiba

6 replies • 15556 views
Discussion

$bitstoreal function in IC6.1.5 systemVerilog

Category: Custom IC Design

By archive
•
updated over 13 years ago by archive

1 replies • 14858 views
Discussion

analoglib relay

Category: Custom IC Design

By Medya
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updated over 13 years ago by Andrew Beckett

1 replies • 15617 views
Discussion

ADE-XL is not picking up custom functions

Category: Custom IC Design

By Arshie
•
updated over 13 years ago by Arshie

2 replies • 13384 views
Discussion

Virtuoso layout XL - assign connectivity to the flattened instance

Category: Custom IC Design

By Roopak25
•
updated over 13 years ago by Andrew Beckett

5 replies • 3815 views
Discussion

How to do multiplication on two voltage signals in ADE

Category: Custom IC Design

By eesm
•
updated over 13 years ago by eesm

2 replies • 16872 views
Discussion

Mixed-Signal Simulation Speed Optimization

Category: Custom IC Design

By TjaartOpperman
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updated over 13 years ago by Quek

1 replies • 13539 views
Discussion

Connectivity Driven Layout

Category: Custom IC Design

By sohaiba
•
updated over 13 years ago by Quek

3 replies • 13642 views
Discussion

how to create netlist using ocean script

Category: Custom IC Design

By gnsh
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updated over 13 years ago by landonairey

2 replies • 15328 views
Discussion

What's the equation behind spectrumMeas() function in Viva calculator?

Category: Custom IC Design

By greatqs
•
updated over 13 years ago by Andrew Beckett

2 replies • 1490 views
Discussion

Passing file name parameter to vpwlf source

Category: Custom IC Design

By k0stas
•
started over 13 years ago

0 replies • 14090 views
Discussion

Translating existing cells into a different technology

Category: Custom IC Design

By bnugent
•
updated over 13 years ago by bnugent

2 replies • 15183 views
Discussion

Calibre(cal_2011.4_35.27) compatible with IC615?

Category: Custom IC Design

By Xiongliang
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updated over 13 years ago by Todd James

6 replies • 3648 views
Discussion

Cannot perform STB analysis in cadence

Category: Custom IC Design

By ayoolanr
•
updated over 13 years ago by Frank Wiedmann

1 replies • 14060 views
Discussion

What's the definition of "Ref node" in QRC extraction?

Category: Custom IC Design

By greatqs
•
updated over 13 years ago by greatqs

2 replies • 3545 views

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