Custom IC Design

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Discussion

Transition in conditional statement, VerilogAMS

Category: Custom IC Design

By mohthi3

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updated over 1 year ago by Andrew Beckett

3 replies • 6405 views
Discussion

Detecting when a Job Policy form is opened or modified

Category: Custom IC Design

By stefanwerleman

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updated over 1 year ago by Andrew Beckett

1 replies • 4449 views
Discussion

assigning a complex value to a design variable in ADE assembler

Category: Custom IC Design

By atataba

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updated over 1 year ago by Andrew Beckett

1 replies • 4566 views
Discussion

Verilog-AMS variable with randomly selected value at each Monte Carlo sample

Category: Custom IC Design

By DomiHammerfall

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updated over 1 year ago by DomiHammerfall

2 replies • 5007 views
Discussion

Wideband High Gain Ultra Low Noise Amplifier

Category: Custom IC Design

By Ali PRSDT

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updated over 1 year ago by Ali PRSDT

2 replies • 5148 views
Discussion

Accuracy of different simulators: APS, spectre, spectre X

Category: Custom IC Design

By anwx

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updated over 1 year ago by anwx

2 replies • 7664 views
Discussion

Error doing in Local Optimisation in ADE Assembler

Category: Custom IC Design

By engmsalik321

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updated over 1 year ago by Andrew Beckett

4 replies • 6429 views
Discussion

Delete certain runs in Monte Carlo simulation.

Category: Custom IC Design

By vignbs0322

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updated over 1 year ago by Andrew Beckett

1 replies • 4513 views
Discussion

Optimize and speed up automatic routing

Category: Custom IC Design

By RuihW

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started over 1 year ago

0 replies • 4413 views
Discussion

Problem on connect all the bus lines together.

Category: Custom IC Design

By SMaxwell

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started over 1 year ago

0 replies • 4778 views
Discussion

Tran simulation results can't be saved when using XPS MS and enabling post-layout optimization?

Category: Custom IC Design

By zuiying

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updated over 1 year ago by Andrew Beckett

1 replies • 1964 views
Discussion

Can not change instance in schematic view

Category: Custom IC Design

By Omar Ghazal

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updated over 1 year ago by Omar Ghazal

2 replies • 5182 views
Discussion

Fail to generate netlist as cell view specified to a SPICE file in Hierarchy Editor

Category: Custom IC Design

By Leo66

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updated over 1 year ago by Leo66

4 replies • 6640 views
Discussion

XF Analysis: How to save transfer function from only certain sources?

Category: Custom IC Design

By Matthew Love

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updated over 1 year ago by Matthew Love

2 replies • 4698 views
Discussion

Virtuoso adexl relxpert aging simulation is disabled

Category: Custom IC Design

By Holz

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started over 1 year ago

0 replies • 4291 views

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