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Custom IC Design

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  • Discussion

    Different results with different simulators

    Category: Custom IC Design

    By Doronzzz

    •

    started over 2 years ago

    0 replies • 5325 views
  • Discussion

    Variable multiplicity factor("m") for different instances of the same cellview in Cadence Virtuoso

    Category: Custom IC Design

    By Saumeek

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 1888 views
  • Discussion

    Save to CSV results of DC Sweep simulation.

    Category: Custom IC Design

    By IKIF

    •

    started over 2 years ago

    0 replies • 4830 views
  • Discussion

    Virtuoso version update issue

    Category: Custom IC Design

    By baobov587

    •

    updated over 2 years ago by baobov587

    2 replies • 6617 views
  • Discussion

    Maestro - device parameter as variable

    Category: Custom IC Design

    By firebolt3

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 3275 views
  • Discussion

    Use variation for sweep different files in AMS simulation

    Category: Custom IC Design

    By nonameirvine

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 5146 views
  • Discussion

    different simulation results issue

    Category: Custom IC Design

    By oweny

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 5808 views
  • Discussion

    Maestro - auto update & run the unsaved schematic

    Category: Custom IC Design

    By firebolt3

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 1050 views
  • Discussion

    modify the font size in virtuoso

    Category: Custom IC Design

    By AB_1716146146878

    •

    updated over 2 years ago by RobMan

    1 replies • 11106 views
  • Discussion

    Explorer to run an AMS simulation by copying the files rather than using their absolute path

    Category: Custom IC Design

    By Pedro P

    •

    started over 2 years ago

    0 replies • 5229 views
  • Discussion

    Create schematic from netlist(verilog)

    Category: Custom IC Design

    By SimhanAnalog

    •

    updated over 2 years ago by SimhanAnalog

    2 replies • 3544 views
  • Discussion

    Export layout from Layout XL

    Category: Custom IC Design

    By overmach

    •

    updated over 2 years ago by Andrew Beckett

    5 replies • 8119 views
  • Discussion

    ViVA- set different color to each psf

    Category: Custom IC Design

    By firebolt3

    •

    updated over 2 years ago by Andrew Beckett

    2 replies • 1362 views
  • Discussion

    CONT: Quantus Run fail: missing the file np_rpoly_conn in the LVS run

    Category: Custom IC Design

    By gaddan14

    •

    updated over 2 years ago by gaddan14

    1 replies • 6547 views
  • Discussion

    create single wire context sensitive menu

    Category: Custom IC Design

    By punya

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 5248 views
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