Digital Implementation

Latest Posts

Discussion

purpose of preCTS stage & latency/skew setting

Category: Digital Implementation

By cyll

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updated over 4 years ago by Dimo M

1 replies • 5223 views
Discussion

Add Power Ring above Core. Innovus

Category: Digital Implementation

By LucaQ

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updated over 4 years ago by Dimo M

1 replies • 13707 views
Discussion

Restrict buffer use for a particular sub block while routing using INNOVUS

Category: Digital Implementation

By RohithSivakumar

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updated over 4 years ago by Dimo M

1 replies • 12205 views
Discussion

How to pass a string variable in the addRings command?

Category: Digital Implementation

By vinayelk

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updated over 4 years ago by Dimo M

1 replies • 11803 views
Discussion

Innovus tutorial

Category: Digital Implementation

By layoutph

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updated over 4 years ago by Dimo M

1 replies • 19463 views
Discussion

Guidelines for the Digital Implementation Forum

Category: Digital Implementation

By Dimo M

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started over 4 years ago

0 replies • 12947 views
Discussion

Global net connections warning on export netlist with power pins for block implementation

Category: Digital Implementation

By Kleber Stangherlin

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updated over 4 years ago by Dimo M

1 replies • 13071 views
Discussion

Which variables give us the H/W information of the Core in Cadence Innovus?

Category: Digital Implementation

By vinayelk

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updated over 4 years ago by Dimo M

1 replies • 3707 views
Discussion

Capacitor Array

Category: Digital Implementation

By JWMP

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updated over 4 years ago by Dimo M

1 replies • 11784 views
Discussion

Innovus - Poly alignment issue

Category: Digital Implementation

By shreyas kv

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updated over 4 years ago by Dimo M

1 replies • 2297 views
Discussion

Parsing FSDB file in python

Category: Digital Implementation

By shahsarik

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updated over 4 years ago by ResearchLev

2 replies • 21202 views
Discussion

Is there a way to name matrixial instances or nets?

Category: Digital Implementation

By Johanny Saenz

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started over 4 years ago

0 replies • 10760 views
Discussion

Power planning of har dmacros.

Category: Digital Implementation

By verilogUser

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started over 4 years ago

0 replies • 10967 views
Discussion

Obtaining power traces using Cadence Virtuoso

Category: Digital Implementation

By birjit

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started over 4 years ago

0 replies • 10913 views
Discussion

Dsp hifi 4 FFT output scaling issue

Category: Digital Implementation

By volansyshem

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updated over 4 years ago by Fasia

2 replies • 14741 views

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