Digital Implementation

Latest Posts

Discussion

Why encounter places std cells on macro?

Category: Digital Implementation

By archive

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updated over 17 years ago by ScreenName

1 replies • 13905 views
Discussion

How to set global clock signal routing in soc encounter?

Category: Digital Implementation

By Renee

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updated over 17 years ago by Kari

1 replies • 13811 views
Discussion

senthesize sub-module

Category: Digital Implementation

By designer

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started over 17 years ago

0 replies • 13530 views
Discussion

soc encounter output to Magic

Category: Digital Implementation

By Renee

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updated over 17 years ago by Renee

4 replies • 14361 views
Discussion

First Encounter pin placement/layer

Category: Digital Implementation

By archive

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updated over 17 years ago by Kari

9 replies • 9167 views
Discussion

Number of Non Equivalence Points after comparison in LEC Conformal

Category: Digital Implementation

By Azhar

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updated over 17 years ago by Azhar

1 replies • 15701 views
Discussion

Encounter/Nanoroute - fixing DRC violations while keeping critical pre-routes untouched

Category: Digital Implementation

By ccabal

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updated over 17 years ago by ccabal

4 replies • 5961 views
Discussion

Disable clock gating check for a module.

Category: Digital Implementation

By Tongju

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started over 17 years ago

0 replies • 16533 views
Discussion

How to stream in Verilog to Virtuoso using "Retain reference library (No Merge)"

Category: Digital Implementation

By naderi

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updated over 17 years ago by BobD

3 replies • 2967 views
Discussion

Power estimation after synthesis and Place-&-route

Category: Digital Implementation

By naderi

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started over 17 years ago

0 replies • 923 views
Discussion

about dbgGPSAutoCellFunction

Category: Digital Implementation

By archive

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updated over 17 years ago by tarekray

5 replies • 14936 views
Discussion

Encounter doesn't find pgpin in the power pad

Category: Digital Implementation

By archive

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updated over 17 years ago by admin

1 replies • 972 views
Discussion

No matching .SUBCKT statement error in LVS check

Category: Digital Implementation

By archive

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updated over 17 years ago by archive

8 replies • 22690 views
Discussion

db command to return cell PG pin layer shape

Category: Digital Implementation

By archive

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started over 17 years ago

0 replies • 13383 views
Discussion

power planning for AMS design

Category: Digital Implementation

By archive

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started over 17 years ago

0 replies • 13336 views

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