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CDNS - double leaderboard script

Digital Implementation

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  • Discussion

    LVS after place&route may fail due to clock tree buffers

    Category: Digital Implementation

    By archive

    •

    updated over 18 years ago by archive

    4 replies • 2359 views
  • Discussion

    Using a PSpice advanced part into a subcircuit

    Category: Digital Implementation

    By archive

    •

    updated over 18 years ago by NewYorkSteve

    1 replies • 14728 views
  • Discussion

    avoid use of certain cells within a subdesign

    Category: Digital Implementation

    By archive

    •

    updated over 18 years ago by archive

    1 replies • 14939 views
  • Discussion

    how could FE extract coupled C when doing timeDesign?

    Category: Digital Implementation

    By archive

    •

    updated over 18 years ago by archive

    3 replies • 15307 views
  • Discussion

    Regarding sample dofile for in lec verify mode

    Category: Digital Implementation

    By admin

    •

    updated over 18 years ago by admin

    1 replies • 15078 views
  • Discussion

    How to get area results in Micron

    Category: Digital Implementation

    By admin

    •

    updated over 18 years ago by admin

    3 replies • 15562 views
  • Discussion

    1 question on command 'congOpt'

    Category: Digital Implementation

    By archive

    •

    started over 18 years ago

    0 replies • 5355 views
  • Discussion

    Encounter buffer footprint

    Category: Digital Implementation

    By archive

    •

    updated over 18 years ago by archive

    5 replies • 17101 views
  • Discussion

    clockSpiceOut

    Category: Digital Implementation

    By archive

    •

    updated over 18 years ago by archive

    1 replies • 14514 views
  • Discussion

    CDC2FAB

    Category: Digital Implementation

    By archive

    •

    started over 18 years ago

    0 replies • 14286 views
  • Discussion

    Running a script on Package library...

    Category: Digital Implementation

    By admin

    •

    started over 18 years ago

    0 replies • 14067 views
  • Discussion

    Adding power ring along IO

    Category: Digital Implementation

    By archive

    •

    started over 18 years ago

    0 replies • 15374 views
  • Discussion

    All, I need good idea when making CTS of clock gating structures.

    Category: Digital Implementation

    By archive

    •

    updated over 18 years ago by archive

    2 replies • 15310 views
  • Discussion

    setup optimisation without sdc file

    Category: Digital Implementation

    By admin

    •

    updated over 18 years ago by archive

    1 replies • 14868 views
  • Discussion

    Test post from the site

    Category: Digital Implementation

    By Anonymous

    •

    started over 18 years ago

    0 replies • 14059 views
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