Digital Implementation

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Welcome to the Place and Route Forum

Category: Digital Implementation

By archive
•
updated over 13 years ago by wally1

2 replies • 13079 views
Discussion

clock latency

Category: Digital Implementation

By archive
•
started over 13 years ago

0 replies • 13109 views
Discussion

Placing bond pads for inline IOs

Category: Digital Implementation

By gops
•
updated over 13 years ago by Anjana

1 replies • 13359 views
Discussion

basic queries

Category: Digital Implementation

By sathyarao
•
started over 13 years ago

0 replies • 12608 views
Discussion

finding load and driver of net using dbcommands.

Category: Digital Implementation

By KVBABU
•
updated over 13 years ago by Kevin P Thomas

1 replies • 13082 views
Discussion

In which file does the Vias widths and heights will be present

Category: Digital Implementation

By kranthiskype
•
updated over 13 years ago by crystee

1 replies • 12846 views
Discussion

Encounter as a LEF viewer ?

Category: Digital Implementation

By Anjana
•
updated over 13 years ago by Anjana

3 replies • 13847 views
Discussion

Diffrence between (ecoRoute) & (setNanoRouteMode -routeWithEco true) commands

Category: Digital Implementation

By vishwa472
•
updated over 13 years ago by vishwa472

2 replies • 2361 views
Discussion

ELC config file

Category: Digital Implementation

By fhagig
•
started over 13 years ago

0 replies • 12582 views
Discussion

Ideas for integrating a full-custom designed layout with a semi-custom designed microprocessor.

Category: Digital Implementation

By Thommandram
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updated over 13 years ago by Thommandram

2 replies • 13006 views
Discussion

regarding non default rule of nets and wires

Category: Digital Implementation

By jaya sree
•
updated over 13 years ago by wally1

1 replies • 13790 views
Discussion

TieHi term C of inst NAND_X is tied to net SEL_0, which connects to none of the inst's power terms

Category: Digital Implementation

By SomAmbali
•
started over 13 years ago

0 replies • 306 views
Discussion

Why Assura extract 2 more pins for each standard cell?

Category: Digital Implementation

By laowang
•
started over 13 years ago

0 replies • 12736 views
Discussion

how to report the total capacitance of a design?

Category: Digital Implementation

By naderi
•
started over 13 years ago

0 replies • 12827 views
Discussion

how can i save power models i have created using build_rtl_power_models ?

Category: Digital Implementation

By mamsadegh
•
started over 13 years ago

0 replies • 12608 views

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