Digital Implementation

basic queries

Category: Digital Implementation

finding load and driver of net using dbcommands.

Category: Digital Implementation

In which file does the Vias widths and heights will be present

Category: Digital Implementation

Encounter as a LEF viewer ?

Category: Digital Implementation

Diffrence between (ecoRoute) & (setNanoRouteMode -routeWithEco true) commands

Category: Digital Implementation

ELC config file

Category: Digital Implementation

Ideas for integrating a full-custom designed layout with a semi-custom designed microprocessor.

Category: Digital Implementation

regarding non default rule of nets and wires

Category: Digital Implementation

TieHi term C of inst NAND_X is tied to net SEL_0, which connects to none of the inst's power terms

Category: Digital Implementation

Why Assura extract 2 more pins for each standard cell?

Category: Digital Implementation

how to report the total capacitance of a design?

Category: Digital Implementation

how can i save power models i have created using build_rtl_power_models ?

Category: Digital Implementation

How to integrate a full-custom designed layout with a semi-custom designed microprocessor.

Category: Digital Implementation

Hello. how to integrate custom design with semi custom design.

Category: Digital Implementation

Howto add more than one Tie High Cell

Category: Digital Implementation