How to Compile System Verilog

Use a newer version of NC, and use the switch +sv.

Shalom

The current version of NC-Verilog is IUS81-s006. Therefore, the version you are using is quite old and may be lacking some of the construct support that you require. I definitely recommend installing a later release.

For your current issue, I'm guessing that you have your class definition outside of a module or package which be considered the "compilation unit scope". This is not supported until IUS62. Move your class definition inside of your module and see if that removes the problem for IUS57. 

Tim

Use irun to compile & simulate in a single step any/all hdl/hvl supported by Incisive platform.

irun is a smart utility that can compile the file based on the default extension.

Check the irun documentation in <ius_inst_dir>/doc/irun/irun.pdf

 rgds,

Amit

Hi All,

 I am trying to run systemverilog files using :

irun -f filelist . 

irun: 10.20-p008: (c) Copyright 1995-2010 Cadence Design Systems, Inc.
TOOL: irun 10.20-p008: Started on Oct 23, 2012 at 09:54:13 IST
irun
 -f filelist
  Globals.sv
  rtl.sv
  interface.sv
  top.sv
  Packet.sv
  Driver.sv
  Receiver.sv
  Coverage.sv
  Scoreboard.sv
  Environemnt.sv
  testcase.sv
file: Globals.sv
file: rtl.sv
file: interface.sv
file: top.sv
file: Packet.sv
file: Driver.sv
file: Receiver.sv
file: Coverage.sv
file: Scoreboard.sv
file: Environemnt.sv
file: testcase.sv
  Caching library 'worklib' ....... Done
 Elaborating the design hierarchy:
 Top level design units:
  $unit_0x04bbcec2
  top
  output_intf[0].cb.read    <= 0;
            |
ncelab: *E,ASNUSE (./Environemnt.sv,56|12): Illegal use of a bit-select, part-select, member-select or mda element [9.3.1(IEEE)].
  output_intf[1].cb.read    <= 0;
            |
ncelab: *E,ASNUSE (./Environemnt.sv,57|12): Illegal use of a bit-select, part-select, member-select or mda element [9.3.1(IEEE)].
  output_intf[2].cb.read    <= 0;
            |
ncelab: *E,ASNUSE (./Environemnt.sv,58|12): Illegal use of a bit-select, part-select, member-select or mda element [9.3.1(IEEE)].
  output_intf[3].cb.read    <= 0;
            |
ncelab: *E,ASNUSE (./Environemnt.sv,59|12): Illegal use of a bit-select, part-select, member-select or mda element [9.3.1(IEEE)].
irun: *E,ELBERR: Error during elaboration (status 1), exiting.
TOOL: irun 10.20-p008: Exiting on Oct 23, 2012 at 09:54:15 IST  (total: 00:00:02)

-------------------------------------------------

Environemnt.sv  has following:

 Please help me to rectify these errors

Thanks and regards,

Chandan

Thanks for your kind reply. Following is the code for output interface :

interface output_interface(input bit clock);

  logic    [7:0] data_out;

  logic    ready;

  logic    read;

  clocking cb@(posedge clock);

    default input #1 output #1;

    input     data_out;

    input     ready;

    output    read;

  endclocking

  modport OP(clocking cb,input clock);

endinterface

 ---------------------------------------

 testcase file these interfaces are passed as :

program testcase(mem_interface.MEM mem_intf,input_interface.IP input_intf,output_interface.OP output_intf[4]);

initial begin

env = new(mem_intf,input_intf,output_intf);

-------------------------------------------------------

then as above environment class has :

 virtual mem_interface.MEM mem_intf ;

virtual input_interface.IP input_intf ;

virtual output_interface.OP output_intf[4] ;

function new(virtual mem_interface.MEM mem_intf_new , virtual input_interface.IP input_intf_new , virtual output_interface.OP output_intf_new[4] ); 

task reset();

output_intf[0].cb.read <= 0;

output_intf[1].cb.read <= 0;

output_intf[2].cb.read <= 0;

output_intf[3].cb.read <= 0;

which shows the error 

Thanks Tim. I am still getting the same error. I ran this code (modified calling reset task from run task )

class Environment ;

  virtual output_interface.OP output_intf[2] ;

  function new( virtual output_interface.OP output_intf_new[2] );

    this.output_intf = output_intf_new ;

    $display(" %0d : Environemnt : created env object",$time);

  endfunction : new

  task reset();

    $display(" %0d : Environemnt : start of reset() method",$time);

    // Drive all DUT inputs to a known state

    output_intf[0].cb.read <= 0;

    output_intf[1].cb.read <= 0;

    $display(" %0d : Environemnt : end of reset() method",$time);

  endtask : reset

task run();
        reset();
endtask : run

endclass : Environment

interface output_interface(input bit clock);

  logic    read;

 clocking cb@(posedge clock);

    default input #1 output #1;

    output    read;

  endclocking

  modport OP(clocking cb,input clock);

endinterface

module top;

bit clock;

initial
        forever #10 clock = ~clock;

  output_interface o[2](clock);

  Environment env = new(o);

endmodule
--------------------------------------------

the log file reads:

irun: 10.20-p008: (c) Copyright 1995-2010 Cadence Design Systems, Inc.
TOOL:   irun    10.20-p008: Started on Oct 26, 2012 at 10:58:10 IST
irun
        tpylant.sv
file: tpylant.sv
        interface worklib.output_interface:sv
                errors: 0, warnings: 0
        module worklib.top:sv
                errors: 0, warnings: 0
                Caching library 'worklib' ....... Done
        Elaborating the design hierarchy:
        Top level design units:
                $unit_0x7631bed7
                top
    output_intf[0].cb.read <= 0;
              |
ncelab: *E,ASNUSE (./tpylant.sv,21|14): Illegal use of a bit-select, part-select, member-select or mda element [9.3.1(IEEE)].
    output_intf[1].cb.read <= 0;
              |
ncelab: *E,ASNUSE (./tpylant.sv,23|14): Illegal use of a bit-select, part-select, member-select or mda element [9.3.1(IEEE)].
irun: *E,ELBERR: Error during elaboration (status 1), exiting.
TOOL:   irun    10.20-p008: Exiting on Oct 26, 2012 at 10:58:11 IST  (total: 00:00:01)

Is this problem due to tool version ?

Regards,

Chandan

I don't have 10.20-p008, but this exact example runs for me in 10.20-s009.

Shalom

Thanks Shalom. Then it seems to be version problem. If anyone could please point to alternative

-Chandan