Help on CONFORMAL LEC flow using Synopsys's Design Compiler netlist

Hi, Rafeeq.

Your best bet is to start with a standard dofile script for RTL to gate compares. Hier compare is recommended but flat can also be used.

These sample dofiles are in the "web interface" documentation. You can access them with "set web on" and then open the browser URL in PC or linux. The WI also has a good document on verifying DC netlists. Look for "LEC Verification".

The WI has a lot of really good documents and I find them really useful.

Here is an example dofile

read library -verilog -replace -both <lib_files>
read library -liberty -replace -both <lib_files>
read design -verilog -replace -golden <design_files>
read design -verilog -replace -revised <design_files>
report design data
report black box -detail
add pin constraint 0 scan_en -golden/revised
add ignore output scan_out -golden/revised
set flatten model -seq_constant
set flatten model -gated_clock
set analyze option -auto
set parallel option -threads 4 -norelease_license

// Uncomment for flat compare

// set system mode lec

// add compared points -all

// compare

// Hier compare after this point. 

write hier_compare dofile hier.do -replace -usage
   -constraint -noexact_pin_match -verbose
   -prepend_string "report design data; usage;
   analyze datapath -module -resourcefile <file> -verbose; usage;
   analyze datapath -verbose; usage "
   -balanced_extraction -input_output_pin_equivalence
   -function_pin_mapping
run hier_compare hier.do -verbose

-ts

 Hi Stark,

                Thanks for providing me the basic flow. I was able to clear the aborts / unmapped points in my design using "analyze setup" , as was suggested to me in my case request.

 In the flow you mentioned, Can i use both "Flattened" and then "hierarchical flow" for my design?

How much important is resource file for the analyze datapth command ?

regards,

rafeeq

Glad to read.

You can use either hier or flat for compares. Hier is better for RTL to gates since it makes for small logic cone sizes and thus helps avoid aborts. Flat is suggested for gate to gate compares (if you encounter modeling or aborts gate to gate then you can try hier).

The resource file is useful for resolving aborts (and avoiding them in a CAD flow). For a one-off run with no aborts it is not needed.

-ts

 Hi ,

          thanks for information. 

        I was facing around 1900 aborts with the flat run, in which most of them seems to be the datapath optimizations. Hence, I fired the hier compare with the flow you suggested, along with resource file . the end result was 2 aborts.

              I want to check all the equiv./non-eq/aborts of the whole design, and diagnise it. But, I'm unable to find the doc. which gives specific information on debug of hier-result. Although there is a chapter in user-guide, it mostly guides about running flow using GUI. Could you please help me on it ?

regards.

rafeeq

There is a lot of good debug material in the "Web Interface".

Type "SETUP> set web on" and view in a browser. See Abort Resolution and LEC Verification.

Also see the LEC debugging quickstart video:

http://trainingondemand.cadence.com

-ts

 Hi ,

         i'm unable to opne the http link which the command "set web on" is generating. The hyper link i snothing but my machine on which tool is running. Is it the expected link ?

regards,

rafeeq

The server is launched from within the tool. The serve will close when the tool closes so keep the tool open.

If you still have problems then file a support ticket (http://support.cadence.com)

-ts

Hi,

      In the above mentioned flow, I can see the "flatten model"commands  uncommented. Does it mean that the modeling commands are also used for hierarchical comparison ? 

regards,

rafeeq

 Yes. By default the flatten model commands will be used by both hier and flat compares. (Whenever changing from setup mode to lec mode. This is done in the generated hier script.)

-ts

Hi,

I'm facing error while applying 'prepend string' command in tcl mode, along with write hier_compare command.

How do i apply the above command in tcl mode.

Regards,

Rafeeq