• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design

PCB Design

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

PCB Design

Latest Posts

  • Create a new Post
  • Discussion

    Length matching

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    2 replies • 13883 views
  • Discussion

    ERROR(248)

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    2 replies • 1301 views
  • Discussion

    Printing from Concept on Linux

    Category: PCB Design

    By archive

    $usertype

    •

    started over 18 years ago

    0 replies • 12697 views
  • Discussion

    Help with via padstack...

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    2 replies • 14612 views
  • Discussion

    Cadstar to Allegro

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    1 replies • 15015 views
  • Discussion

    One point ground using dynamic shapes

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    2 replies • 13603 views
  • Discussion

    power integrity analysis

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    2 replies • 13591 views
  • Discussion

    Distance between power planes for a split plane?

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    3 replies • 17313 views
  • Discussion

    Routing_with_fanout

    Category: PCB Design

    By archive

    $usertype

    •

    started over 18 years ago

    0 replies • 12766 views
  • Discussion

    Test nodes and Rnets oh my!

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    6 replies • 16144 views
  • Discussion

    Can Power Plane be used as a return

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    1 replies • 13931 views
  • Discussion

    Backaanotaion of pin swaps for fpga's

    Category: PCB Design

    By archive

    $usertype

    •

    started over 18 years ago

    0 replies • 429 views
  • Discussion

    Metric Designs

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    2 replies • 13637 views
  • Discussion

    Stacked Via routing issue.

    Category: PCB Design

    By archive

    $usertype

    •

    started over 18 years ago

    0 replies • 12746 views
  • Discussion

    Elctrical Constraints

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 18 years ago by archive

    1 replies • 13512 views
<>
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information