• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. RF Design
CDNS - double leaderboard script

RF Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    how to view sweep points on Smith chart

    Category: RF Design

    By dxt78

    •

    updated over 15 years ago by Andrew Beckett

    1 replies • 15221 views
  • Discussion

    Threshold crossing problem in Pnoise jitter mode

    Category: RF Design

    By ycyang

    •

    started over 15 years ago

    0 replies • 15757 views
  • Discussion

    Input impedance measurement using sp analysis for 3 port Cfmom

    Category: RF Design

    By yayla

    •

    updated over 15 years ago by yayla

    1 replies • 15488 views
  • Discussion

    problem with spectreRF

    Category: RF Design

    By abouzied

    •

    updated over 15 years ago by Andrew Beckett

    7 replies • 19433 views
  • Discussion

    Exporting .gds file from cadence

    Category: RF Design

    By nadroit

    •

    updated over 15 years ago by Andrew Beckett

    6 replies • 25511 views
  • Discussion

    Problem in LVS checkingin Layout

    Category: RF Design

    By Analog Design

    •

    updated over 15 years ago by Andrew Beckett

    1 replies • 16852 views
  • Discussion

    About the parasitic reduction in Spectre Turbo mode

    Category: RF Design

    By ycyang

    •

    updated over 15 years ago by Andrew Beckett

    3 replies • 17027 views
  • Discussion

    Minimum beat frequency setting for PSS analysis to have smaller step size sweep in PAC,PXF

    Category: RF Design

    By RFQuery

    •

    updated over 15 years ago by Andrew Beckett

    1 replies • 2607 views
  • Discussion

    How to simulate Bit error rate in High speed Comparators

    Category: RF Design

    By Samaneh

    •

    started over 15 years ago

    0 replies • 14615 views
  • Discussion

    IBM45nm (SOI ) technology Gate resistance problem

    Category: RF Design

    By nadroit

    •

    started over 15 years ago

    0 replies • 14381 views
  • Discussion

    IC 614 installation issue

    Category: RF Design

    By FormerMember

    •

    updated over 15 years ago by Andrew Beckett

    1 replies • 7744 views
  • Discussion

    Class AB Power Amplifier Problem

    Category: RF Design

    By Palanisamy

    •

    started over 15 years ago

    0 replies • 14984 views
  • Discussion

    Question about jitter mode and modulated mode in PNOISE

    Category: RF Design

    By ycyang

    •

    updated over 15 years ago by Frank Wiedmann

    1 replies • 15531 views
  • Discussion

    Relative Path to Device's Containing Folder

    Category: RF Design

    By amaggs

    •

    updated over 15 years ago by Tawna

    1 replies • 2402 views
  • Discussion

    help me to design RF cmos 180 nm amplifier

    Category: RF Design

    By sosaso

    •

    started over 15 years ago

    0 replies • 14698 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information