• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • Site
  • Community Search
  • User
Forum - Thread List
  • Not Answered

    How to update parts already placed from the Database 0

    20397 views
    5 replies
    Latest over 5 years ago
    by BK2001
  • Not Answered

    Design Entry HDL 0

    18172 views
    5 replies
    Latest over 5 years ago
    by tmd63
  • Not Answered

    Import user defined property from Capture schematic to PCB-Editor Layout 0

    10763 views
    2 replies
    Latest over 5 years ago
    by Davide98
  • Discussion

    How to show physical net names in schcref ? Locked

    12147 views
    0 replies
    Started over 5 years ago
    by mikentucson
  • Discussion

    Ground plane: pad does not connect to it

    16604 views
    2 replies
    Latest over 5 years ago
    by Nicolas S
  • Discussion

    OrCAD PCB Designer Standard : Adding a via array

    14914 views
    3 replies
    Latest over 5 years ago
    by Nicolas S
  • Not Answered

    How to dock to command Window in Orcad Capture 0

    15256 views
    3 replies
    Latest over 5 years ago
    by DrZ80
  • Discussion

    Sigrity System Explorer/Speed2000 sim: Simulation with long duration ends with 'Simulation Aborted' Locked

    1410 views
    0 replies
    Started over 5 years ago
    by deezer
  • Discussion

    Trace end square

    14947 views
    4 replies
    Latest over 5 years ago
    by Nicolas S
  • Not Answered

    Capture / Allegro V17.4 Issues 0

    24152 views
    21 replies
    Latest over 5 years ago
    by RFinley
  • Discussion

    How to void filled rectangle from Siilkscreen top

    13454 views
    2 replies
    Latest over 5 years ago
    by Nicolas S
  • Discussion

    VRM report not able to edit in DC Analysis Block Diagram Result of Power dc sign off report Locked

    11520 views
    0 replies
    Started over 5 years ago
    by jishu
  • Discussion

    Need help with axlGetMetalUsageForLayer

    9694 views
    2 replies
    Latest over 5 years ago
    by luanvn81
  • Answered

    Replace off-page connector by Hierarchical Port - Allegro Design Entry CIS 16.6 0

    9508 views
    8 replies
    Latest over 5 years ago
    by David George
  • Discussion

    How to highlight component based on degree? Locked

    12103 views
    1 reply
    Latest over 5 years ago
    by steve
<>

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information